GDM2004D Datasheet, PDF (8/9 Pages) List of Unclassifed Manufacturers – SPECIFICATIONS OF LCD MODULE

GDM2004D-FL-YBW
Instruction table
Instruction code
Instruction
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description
Clear
Display
Return
Home
Entry mode
Set
Display ON/
OFF control
Cursor or
Display shift
Function set
Set CGRAM
Address
Set DDRAM
Address
Read busy
Flag and
Address
Write data to
Address
Read data
From RAM
Write “20H” to DDRA and set
0
0
0
0
0
0
0
0
0
1 DDRAM address to “00H”
from AC
Set DDRAM address to “00H”
From AC and return cursor to
0
0
0
0
0
0
0
0
1
- Its original position if shifted.
The contents of DDRAM are
not changed.
0
0
0
0
0
0
0
1
I/D
SH
Assign cursor moving direction
And blinking of entire display
Set display (D), cursor (C), and
0 0 0 0 0 0 1 D C B Blinking of cursor (B) on/off
Control bit.
Set cursor moving and display
Shift control bit, and the
0
0
0
0
0
1 S/C R/L -
- _{Direction, without changing of}
DDRAM data.
Set interface data length (DL: 8-
0
0
0
0
1 DL N
F
-
-
Bit/4-bit), numbers of display
Line (N: =2-line/1-line) and,
Display font type (F: 5x11/5x8)
0
0
0
1
AC5
AC4
AC3
AC2
AC1
AC0
Set CGRAM address in address
Counter.
0
0
1
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Set DDRAM address in address
Counter.
Whether during internal
Operation or not can be known
0
1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 By reading BF. The contents of
Address counter can also be
read.
Write data into internal RAM
1
0
D7 D6 D5 D4 D3 D2 D1 D0 _{(DDRAM/CGRAM).}
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read data from internal RAM
(DDRAM/CGRAM).
Execution
Time (fosc=
270 KHZ
1.53ms
1.53ms
39us
39us
39us
39us
39us
0us
43us
43us
NOTE: When an MPU program with checking the busy flag (DB7) is made, it must be necessary 1/2fosc is necessary for
executing the next instruction by the falling edge of the “E” signal after the busy flag (DB7) goes to “Low”.
DDRAM address:
Display position
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53
14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27
54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67
DDRAM address
VER 1.0
8/9
2003/12/09