NUC505DLA Datasheet, PDF (78/130 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller

0x001F_FFFF
SPI
Flash
NUC505
Example:
SYS_RVMPADDR[31:0] = 0x2000_AB00
SYS_RVMPLEN[31:24] = 0x02
0x2001_FFFF
0x0000_0800
0x0000_07FF
0x0000_0000
2 Kbytes
Vector
mapping
2 Kbytes
0x2000_B2FF
0x2000_AB00
0x2000_0000
Figure 6.2-4 Vector Map Module Block
6.2.7 AHB Bus Arbitration
The internal bus of NUC505 is an AHB-Compliant Bus and supports to connect with the standard AHB
master or slave. The NUC505 AHB arbiter provides a choice of two arbitration algorithms for
simultaneous requests. These two arbitration algorithms are the Fixed-priority mode and the Round-
robin- priority (rotate) mode. The selection of modes and types is determined in the PRISEL field of
the SYS_AHBCTL control register.
6.2.7.1 Fixed Priority Mode
Fixed priority mode is selected if PRISEL = 0. The order of priorities on the AHB mastership among
the on-chip master modules are listed in Table 6.2-3.
Priority Sequence
(PRISEL = 0)
1 (Lowest)
2
3
4
5
June 30, 2016
Page 78 of 130
AHB Bus Priority
Cortex-M4 I
Cortex-M4 D
Cortex-M4 System
SPIM
USBD
Rev 1.06