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LM3S1110 Datasheet, PDF (63/377 Pages) List of Unclassifed Manufacturers – Microcontroller
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LM3S1110 Microcontroller
Register 6: Masked Interrupt Status and Clear (MISC), offset 0x058
Central location for system control result of RIS AND IMC to generate an interrupt to the controller.
All of the bits are R/W1C and this action also clears the corresponding raw interrupt bit in the RIS
register (see page 61).
SHRM says: It is more than the contents of the RIS register ANDed with the the contents of the IMC
register. This register latches a positive AND result and holds it until cleared by software. A straight
combinatoric AND is insufficient. CR: What do we want to say in para?
Masked Interrupt Status and Clear (MISC)
Base 0x400F.E000
Offset 0x058
Type R/W1C, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
PLLLMIS
reserved
BORMIS reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO R/W1C RO
RO
RO
RO R/W1C RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:7
6
5:2
1
0
Name
reserved
PLLLMIS
reserved
BORMIS
reserved
Type
RO
R/W1C
RO
R/W1C
RO
Reset
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PLL Lock Masked Interrupt Status
This bit is set when the PLL TREADY timer asserts. The interrupt is cleared
by writing a 1 to this bit.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
BOR Masked Interrupt Status
The BORMIS is simply the BORRIS ANDed with the mask value, BORIM.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
September 02, 2007
63
Preliminary
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