MTL007 Datasheet, PDF (57/65 Pages) List of Unclassifed Manufacturers – SXGA Flat Panel Controller

D1
Power Down all the clocks except REFCLK
0: Normal;
1: Power Down
D0
Software Reset Enable
0: Disable;
1: Enable
*Line Buffer Self Test Control (Address F8h) (R/W)
It controls the operation of Line Buffer Self Test Mode.
D7-2
Reserved
D1
Line Buffer Self Test mode Finish Status (RO)
0: Finish;
1: Not Finish
D0
Line Buffer Self Test mode Enable
0: Disable;
1: Enable
*Line Buffer Self Test Result Status (Address F9h) (RO)
It contains the status of Line Buffer Self Test Mode result.
D7-5
Reserved
D4
Line Buffer 4 Self Test mode Result Status (RO)
0: Success;
1: Fail
D3
Line Buffer 3 Self Test mode Result Status (RO)
0: Success;
1: Fail
D2
Line Buffer 2 Self Test mode Result Status (RO)
0: Success;
1: Fail
D1
Line Buffer 1 Self Test mode Result Status (RO)
0: Success;
1: Fail
D0
Line Buffer 0 Self Test mode Result Status (RO)
0: Success;
1: Fail
*Debug/Test Mode Control (Address FAh) (R/W)
D7
Reserved
*D6-4
Internal Top Debug Bus Select
D3-2
Reserved
MTL007
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