LM3S601 Datasheet, PDF (54/446 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
6 System Control
6.1
6.1.1
6.1.2
6.1.2.1
6.1.2.2
System control determines the overall operation of the device. It provides information about the
device, controls the clocking to the core and individual peripherals, and handles reset detection and
reporting.
Functional Description
The System Control module provides the following capabilities:
■ Device identification, see “Device Identification” on page 54
■ Local control, such as reset (see “Reset Control” on page 54), power (see “Power
Control” on page 57) and clock control (see “Clock Control” on page 57)
■ System control (Run, Sleep, and Deep-Sleep modes), see “System Control” on page 60
Device Identification
Seven read-only registers provide software with information on the microcontroller, such as version,
part number, SRAM size, flash size, and other features. See the DID0, DID1, and DC0-DC4 registers.
Reset Control
This section discusses aspects of hardware functions during reset as well as system software
requirements following the reset sequence.
Reset Sources
The controller has six sources of reset:
1. External reset input pin (RST) assertion, see “RST Pin Assertion” on page 54.
2. Power-on reset (POR), see “Power-On Reset (POR)” on page 55.
3. Internal brown-out (BOR) detector, see “Brown-Out Reset (BOR)” on page 55.
4. Software-initiated reset (with the software reset registers), see “Software Reset” on page 56.
5. A watchdog timer reset condition violation, see “Watchdog Timer Reset” on page 57.
6. Internal low drop-out (LDO) regulator output
After a reset, the Reset Cause (RESC) register is set with the reset cause. The bits in this register
are sticky and maintain their state across multiple reset sequences,except when an external reset
is the cause, and then all the other bits in the RESC register are cleared.
Note: The main oscillator is used for external resets and power-on resets; the internal oscillator
is used during the internal process by internal reset and clock verification circuitry.
RST Pin Assertion
The external reset pin (RST) resets the controller. This resets the core and all the peripherals except
the JTAG TAP controller (see “JTAG Interface” on page 44). The external reset sequence is as
follows:
54
October 01, 2007
Preliminary