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EFM32GG230 Datasheet, PDF (51/66 Pages) List of Unclassifed Manufacturers – High Performance 32-bit processor up to 48 MHz
Preliminary
...the world's most energy friendly microcontrollers
Alternate
LOCATION
Functionality
0
1
2
3
4
5
US0_TX
US1_CLK
US1_CS
US1_RX
US1_TX
US2_CLK
US2_CS
US2_RX
US2_TX
PE10
PC11 PE13 PB7 PC0
PB7 PD2
PF0
PB8 PD3
PF1
PC1 PD1
PD6
PC0 PD0
PD7
PC4
PC5
PC3
PC2
6
Description
USART0 Synchronous mode Master Input / Slave Output
(MISO).
USART0 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
USART0 Synchronous mode Master Output / Slave Input
(MOSI).
USART1 clock input / output.
USART1 chip select input / output.
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave Output
(MISO).
USART1 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
USART1 Synchronous mode Master Output / Slave Input
(MOSI).
USART2 clock input / output.
USART2 chip select input / output.
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Output
(MISO).
USART2 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
USART2 Synchronous mode Master Output / Slave Input
(MOSI).
4.3 GPIO pinout overview
The specific GPIO pins available in EFM32GG230 is shown in Table 4.3 (p. 51) . Each GPIO port is
organized as 16-bit ports indicated by letters A through F, and the individual pin on this port in indicated
by a number from 15 down to 0.
Table 4.3. GPIO Pinout
Port
Port A
Port B
Port C
Port D
Port E
Port F
Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
PA15 -
-
-
- PA10 PA9 PA8
-
PA6 PA5 PA4 PA3 PA2 PA1 PA0
- PB14 PB13 PB12 PB11 -
-
PB8 PB7
-
-
-
-
-
-
-
PC15 PC14 PC13 PC12 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
-
-
-
-
-
-
-
PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PF5 PF4 PF3 PF2 PF1 PF0
4.4 Opamp pinout overview
The specific opamp terminals available in EFM32GG230 is shown in Figure 4.2 (p. 52) .
2012-09-11 - EFM32GG230FXX - d0035_Rev1.00
51
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