LM3S8630-IQC50 Datasheet, PDF (436/519 Pages) List of Unclassifed Manufacturers – LM3S8630 Microcontroller

Ethernet Controller
Register 17: Ethernet PHY Management Register 1 – Status (MR1), address
0x01
This register enables software to determine the capabilities of the PHY and perform its initialization
and operation appropriately.
Ethernet PHY Management Register 1 – Status (MR1)
Base 0x4004.8000
Address 0x01
Type RO, reset 0x7849
15
14
13
12
11
10
9
8
reserved 100X_F 100X_H 10T_F 10T_H
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
1
1
1
1
0
0
0
7
6
5
4
3
2
1
0
MFPS ANEGC RFAULT ANEGA LINK
JAB EXTD
RO
RO
RO
RC
RO
RO
RC
RO
0
1
0
0
1
0
0
1
Bit/Field
15
14
13
12
11
10:7
6
5
4
Name
reserved
100X_F
100X_H
10T_F
10T_H
reserved
MFPS
ANEGC
RFAULT
Type
RO
RO
RO
RO
RO
RO
RO
RO
RC
Reset
0
1
1
1
1
0
1
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
100BASE-TX Full-Duplex Mode
When set, indicates that the PHY is capable of supporting 100BASE-TX
Full-Duplex mode.
100BASE-TX Half-Duplex Mode
When set, indicates that the PHY is capable of supporting 100BASE-TX
Half-Duplex mode.
10BASE-T Full-Duplex Mode
When set, indicates that the PHY is capable of 10BASE-T Full-Duplex
mode.
10BASE-T Half-Duplex Mode
When set, indicates that the PHY is capable of supporting 10BASE-T
Half-Duplex mode.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Management Frames with Preamble Suppressed
When set, indicates that the Management Interface is capable of
receiving management frames with the preamble suppressed.
Auto-Negotiation Complete
When set, indicates that the Auto-Negotiation process has been
completed and that the extended registers defined by the
Auto-Negotiation protocol are valid.
Remote Fault
When set, indicates that a remote fault condition has been detected.
This bit remains set until it is read, even if the condition no longer exists.
436
March 17, 2008
Preliminary