M-8870 Datasheet, PDF (4/8 Pages) Clare, Inc. – DTMF Receiver

M-8870
Table 2 Absolute Maximum Ratings
Parameter
Symbol
Value
Power supply voltage (V_DD - V_SS)
V_DD
Voltage on any pin
V_DC
Current on any pin
I_DD
Operating temperature
T_A
Storage temperature
T_S
6.0 V max
V_SS -0.3, V_DD +0.3
10 mA max
-40°C to + 85°C
-65°C to + 150°C
Note:
Exceeding these ratings may cause permanent damage. Functional operation under these conditions is not implied.
Table 3 DC Characteristics
Parameter
Symbol
Min
Typ*
Max
Units
Test Conditions
Operating supply voltage
V_DD
4.75
5.25
V
Operating supply current
I_DD
3.0
7.0
mA
Standby supply current (see Note 3)
I_DDQ
100
µ^A
PD=V_DD
Power consumption
P_O
15
35
mW
f = 3.579 MHz, V_DD = 5.0 V
Low level input voltage
V_IL
1.5
V
High level input voltage
V_IH
3.5
V
Input leakage current
I_IH/I_IL
0.1
µA
V_IN = V_SS or V_DD (see Note 2)
Pullup (source) current on OE
I_SO
6.5
15.0
µA
OE = 0 V
Input impedance, signal inputs 1, 2
R_IN
8
10
mΩ
@ 1 kHz
Steering threshold voltage
V_TSt
2.2
2.5
V
Low level output voltage
V_OL
0.03
V
No load
High level output voltage
V_OH
4.97
V
No load
Output low (sink) current
I_OL
1.0
2.5
mA
V_OUT = 0.4 V
Output high (source) current
I_OH
0.4
0.8
mA
V_OUT = 4.6 V
Output voltage V_REF
V_REF
2.4
2.7
V
No load
Output resistance V_REF
R_OR
10
kΩ
*Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Notes:
1. All voltages referenced to V_SS unless otherwise noted. For typical values, V_DD = 5.0V, V_SS = 0V, TA = 25°C.
2. Input pins defined as IN+, IN-, or OE.
3. -02 only.
Table 4 Operating Characteristics - Gain Setting Amplifier
Parameter
Symbol
Min
Typ*
Max
Units
Input leakage current
I_N
± 100
nA
Input resistance
R_IN
4
MΩ
Input offset voltage
V_OS
± 25
mV
Power supply rejection
PSRR
50
dB
Common mode rejection
CMRR
55
dB
DC open loop voltage gain
Open loop unity gain bandwidth
Output voltage swing
A_VOL
f_C
V_O
60
1.2
1.5
3.5
dB
MHz
V_P-P
Tolerable capacitive load (GS)
C_L
Tolerable resistive load (GS)
R_L
100
pF
50
kΩ
Common mode range
V_CM
2.5
V _P-P
*Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Note:
1. All voltages referenced to V_SS unless otherwise noted. For typical values V_DD = 5.0 V, V_SS = 0 V, TA = 25°C.
Test Conditions
V_SS < V_IN < V_DD
1 KHz
-3.0V < V_IN < 3.0V
RL ≥ 100 KΩ to V_SS
No load
Teltone Corporation, 22121-20th Avenue SE, Bothell, WA 98021-4408 U.S.A
40-406-00011, Rev. E
Page 4
Phone: [phone] or 425-487-1515 Fax: [phone]
E-mail: [e-mail] Internet: www.teltone.com