AT45DB041E Datasheet, PDF (34/71 Pages) List of Unclassifed Manufacturers – 4-Mbit DataFlash (with Extra 128-Kbits), 1.65V Minimum SPI Serial Flash Memory

10.2.1 Exit Ultra-Deep Power-Down
To exit from the Ultra-Deep Power-Down mode, the CS pin must simply be pulsed by asserting the CS pin, waiting the
minimum necessary t_CSLU time, and then deasserting the CS pin again. To facilitate simple software development, a
dummy byte opcode can also be entered while the CS pin is being pulsed just as in a normal operation like the Program
Suspend operation; the dummy byte opcode is simply ignored by the device in this case. After the CS pin has been
deasserted, the device will exit from the Ultra-Deep Power-Down mode and return to the standby mode within a
maximum time of t_XUDPD. If the CS pin is reasserted before the t_XUDPD time has elapsed in an attempt to start a new
operation, then that operation will be ignored and nothing will be performed. The system must wait for the device to return
to the standby mode before normal command operations such as Continuous Array Read can be resumed.
Since the contents of the SRAM buffers cannot be maintained while in the Ultra-Deep Power-Down mode, the SRAM
buffers will contain undefined data when the device returns to the standby mode.
Figure 10-4. Exit Ultra-Deep Power-Down
CS
t_CSLU
SO ^{High-impedance}
t_XUDPD
Active Current
I_CC
Standby Mode Current
Ultra-Deep Power-Down Mode Current
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