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LM3S800 Datasheet, PDF (330/378 Pages) List of Unclassifed Manufacturers – Microcontroller
Analog Comparators
14.3
14.4
ACREFCTL Register
Output Reference Voltage Based on VREF Field Value
EN Bit Value RNG Bit Value
EN=1
RNG=0 Total resistance in ladder is 32 R.
R
V
REF
=
AV
DD
×
-----V----R----E---F
R
T
V
REF
=
AV
DD
×
(---V-----R----E--3--F-2-----+----8----)
RNG=1
V = 0.825 + 0.103 VR EF
R EF
The range of internal reference in this mode is 0.825-2.37 V.
Total resistance in ladder is 24 R.
R
V
REF
=
AV
DD
×
-----V----R----E---F
R
T
V
REF
=
AV
DD
×
(---V-----R----E----F----)
24
VREF = 0.1375 x VREF
The range of internal reference for this mode is 0.0-2.0625 V.
Initialization and Configuration
The following example shows how to configure an analog comparator to read back its output value
from an internal register.
1. Enable the analog comparator 0 clock by writing a value of 0x0010.0000 to the RCGC1 register
in the System Control module.
2. In the GPIO module, enable the GPIO port/pin associated with C0- as a GPIO input.
3. Configure the internal voltage reference to 1.65 V by writing the ACREFCTL register with the
value 0x0000.030C.
4. Configure comparator 0 to use the internal voltage reference and to not invert the output on the
C0o pin by writing the ACCTL0 register with the value of 0x0000.040C.
5. Delay for some time.
6. Read the comparator output value by reading the ACSTAT0 register’s OVAL value.
Change the level of the signal input on C0- to see the OVAL value change.
Register Map
Table 14-5 on page 331 lists the comparator registers. The offset listed is a hexadecimal increment
to the register’s address, relative to the Analog Comparator base address of 0x4003.C000.
330
November 29, 2007
Preliminary