N551C321 Datasheet, PDF (3/8 Pages) List of Unclassifed Manufacturers – 32Mbit Mask ROM with interface with Nuvoton PowerSpeech

N551C321
3. BLOCK DIAGRAM
CS/CSB
VDD VSS
BS
ADDR
DATA1
/SDI
DATA2
/SDO
CLK/SCLK
SIM/
SPI
SIM/
SPI
DATA1
SDI
DATA2
SDO
Shift
Register
/
Address
Counter
Address
Decoder
Output
Buffer
Clock
Generator
16M Bits
ROM
16M Bits
ROM
4. PIN DESCRIPTION
4.1.1 W551C interface pad
SYMBOL
BS
ADDR
CLK
DATA1
DATA2
CS
VSS
VDD
I/O FUNCTION
I Memory Bank selection
“0”: Lower 16Mbit; “1”: Higher 16Mbit
I Clock input for shift-in the start address;
The first rising edge signals will reset the address counter.
I Clock input for Data read/write
I/O Bi-directional data pin with internal pull-high
I/O Bi-directional data pin with internal pull-high for cascade data through
I Chip select pin, active-low chip enable.
I Microcontroller Negative power supply (-).
I Microcontroller Positive power supply (+).
4.1.2 SPI interface pad
SYMBOL
SDI
SDO
SCLK
I/O FUNCTION
I Command/address input
O Data output
I Clock input
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