EFM32GG980 Datasheet, PDF (3/73 Pages) List of Unclassifed Manufacturers – EFM32GG980 DATASHEET

Preliminary
2 System Summary
...the world's most energy friendly microcontrollers
2.1 System Introduction
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination of
the powerful 32-bit ARM Cortex-M3, innovative low energy techniques, short wake-up time from energy
saving modes, and a wide selection of peripherals, the EFM32GG microcontroller is well suited for
any battery operated application as well as other systems requiring high performance and low-energy
consumption. This section gives a short introduction to each of the modules in general terms and also
and shows a summary of the configuration for the EFM32GG980 devices. For a complete feature set
and in-depth information on the modules, the reader is referred to the EFM32GG Reference Manual.
A block diagram of the EFM32GG980 is shown in Figure 2.1 (p. 3) .
Figure 2.1. Block Diagram
GG9 8 0 F5 1 2 / 1 0 2 4
Core and Mem ory
Clock Managem ent
ARM Cort ex™-M3 processor
Mem ory
Prot ect ion
Unit
Flash
Pr o g r a m
Mem ory
RAM
Mem ory
Debug
In t er f ace
w/ ETM
DMA
Cont roller
High Freq.
Cryst al
Oscillat or
Low Freq.
Cryst al
Oscillat or
High Freq
RC
Oscillat or
Low Freq.
RC
Oscillat or
Ult ra Low Freq.
RC
Oscillat or
Energy Managem ent
Volt ag e
Regulat or
Volt ag e
Com parat or
Br ow n -ou t
Detector
Back-up
Po w e r
Dom ain
Po w e r -o n
Reset
Serial Int erfaces
USART
UART
Low
En e r g y
I ²C
UART
USB
32-bit bus
Peripheral Reflex Syst em
I/O Port s
Tim ers and Triggers
Ext . Bus
In t er f ace
TFT
Driver
Ext ernal
In t er r u p t s
Ge n e r a l
Pu r p o se
I/O
Pin
Reset
Pin
Wakeup
Tim er/
Count er
LESENSE
Low Energy Real Tim e
Tim er
Count er
Pu l se
Count er
Watchdog
Tim er
Back-up
RTC
Analog Interfaces
ADC
LCD
Cont roller
DAC
Operat ional
Am plifier
Pu l se
Count er
Securit y
Hardware
AES
2.1.1 ARM Cortex-M3 Core
The ARM Cortex-M3 includes a 32-bit RISC processor which can achieve as much as 1.25 Dhrystone
MIPS/MHz. A Memory Protection Unit with support for up to 8 memory segments is included, as well
as a Wake-up Interrupt Controller handling interrupts triggered while the CPU is asleep. The EFM32
implementation of the Cortex-M3 is described in detail in EFM32 Cortex-M3 Reference Manual.
2.1.2 Debug Interface (DBG)
This device includes hardware debug support through a 2-pin serial-wire debug interface and an Embed-
ded Trace Module (ETM) for data/instruction tracing. In addition there is also a 1-wire Serial Wire Viewer
pin which can be used to output profiling information, data trace and software-generated messages.
2.1.3 Memory System Controller (MSC)
The Memory System Controller (MSC) is the program memory unit of the EFM32GG microcontroller.
The flash memory is readable and writable from both the Cortex-M3 and DMA. The flash memory is
2012-09-11 - EFM32GG980FXX - d0045_Rev1.00
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