CD4066BCN Datasheet, PDF (3/9 Pages) List of Unclassifed Manufacturers – Wide supply voltage range 3V to 15V

AC Electrical Characteristics (Note 3)
T_A = 25°C, t_r = t_f = 20 ns and V_SS = 0V unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t_PHL, t_PLH
Propagation Delay Time Signal
Input to Signal Output
t_PZH, t_PZL
t_PHZ, t_PLZ
Propagation Delay Time
Control Input to Signal
Output High Impedance to
Logical Level
Propagation Delay Time
Control Input to Signal
Output Logical Level to
High Impedance
Sine Wave Distortion
Frequency Response-Switch
“ON” (Frequency at −3 dB)
V_C = V_DD, C_L = 50 pF, (Figure 1)
R_L = 200k
V_DD = 5V
V_DD = 10V
V_DD = 15V
R_L = 1.0 kΩ, C_L = 50 pF, (Figure 2, Figure 3)
V_DD = 5V
V_DD = 10V
V_DD = 15V
R_L = 1.0 kΩ, C_L = 50 pF, (Figure 2, Figure 3)
V_DD = 5V
V_DD = 10V
V_DD = 15V
V_C = V_DD = 5V, V_SS = −5V
R_L = 10 kΩ, V_IS = 5V_p-p, f= 1 kHz, (Figure 4)
V_C = V_DD = 5V, V_SS = −5V,
R_L = 1 kΩ, V_IS = 5V_p-p,
20 Log₁₀ V_OS/V_OS (1 kHz)−dB,
(Figure 4)
25
55
ns
15
35
ns
10
25
ns
125
ns
60
ns
50
ns
125
ns
60
ns
50
ns
0.1
%
40
MHz
Feedthrough — Switch “OFF”
(Frequency at −50 dB)
Crosstalk Between Any Two
Switches (Frequency at −50 dB)
Crosstalk; Control Input to
Signal Output
V_DD = 5.0V, V_CC = V_SS = −5.0V,
R_L = 1 kΩ, V_IS = 5.0V_p-p, 20 Log₁₀,
V_OS/V_IS = −50 dB, (Figure 4)
V_DD = V_C(A) = 5.0V; V_SS = V_C(B) = 5.0V,
R_L1 kΩ, V_IS(A) = 5.0 V_p-p, 20 Log₁₀,
V_OS(B)/V_IS(A) = −50 dB (Figure 5)
V_DD = 10V, R_L = 10 kΩ, R_IN = 1.0 kΩ,
V_CC = 10V Square Wave, C_L = 50 pF
(Figure 6)
1.25
0.9
150
MHz
mV_p-p
Maximum Control Input
R_L = 1.0 kΩ, C_L = 50 pF, (Figure 7)
V_OS(f) = ½ V_OS(1.0 kHz)
V_DD = 5.0V
V_DD = 10V
V_DD = 15V
C_IS
Signal Input Capacitance
C_OS
Signal Output Capacitance
V_DD = 10V
C_IOS
Feedthrough Capacitance
V_C = 0V
C_IN
Control Input Capacitance
Note 3: AC Parameters are guaranteed by DC correlated testing.
6.0
MHz
8.0
MHz
8.5
MHz
8.0
pF
8.0
pF
0.5
pF
5.0
7.5
pF
Note 4: These devices should not be connected to circuits with the power “ON”.
Note 5: In all cases, there is approximately 5 pF of probe and jig capacitance in the output; however, this capacitance is included in C_L wherever it is
specified.
Note 6: V_IS is the voltage at the in/out pin and V_OS is the voltage at the out/in pin. V_C is the voltage at the control input.
Note 7: Conditions for V_IHC: a) V_IS = V_DD, I_OS = standard B series I_OH b) V_IS = 0V, I_OL = standard B series I_OL.
3
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