AT25DF011 Datasheet, PDF (3/39 Pages) List of Unclassifed Manufacturers – 1-Mbit, 1.65V Minimum SPI Serial Flash Memory with Dual-I/O Support

Table 2-1. Pin Descriptions (Continued)
Symbol Name and Function
Asserted
State
SERIAL OUTPUT: The SO pin is used to shift data out from the device. Data on the SO pin is
always clocked out on the falling edge of SCK.
With the Dual-Output Read commands, the SO Pin remains an output pin (I/O₁) in conjunction
with other pins to allow two bits of data on (I/O_1-0) to be clocked out on every falling edge of SCK.
SO (I/O₁) _{To maintain consistency with the SPI nomenclature, the SO (I/O1) pin will be referenced as the}
-
SO pin unless specifically addressing the Dual-I/O modes in which case it will be referenced as
I/O_1.
The SO pin will be in a high-impedance state whenever the device is deselected (CS is
deasserted).
WRITE PROTECT: The WP pin controls the hardware locking feature of the device. Please refer
to “Protection Commands and Features” on page 12 for more details on protection features and
the WP pin.
WP
Low
The WP pin is internally pulled-high and may be left floating if hardware controlled protection will
not be used. However, it is recommended that the WP pin also be externally connected to V_CC
whenever possible.
HOLD
HOLD: The HOLD pin is used to temporarily pause serial communication without deselecting or
resetting the device. While the HOLD pin is asserted, transitions on the SCK pin and data on the
SI pin will be ignored, and the SO pin will be in a high-impedance state.
The CS pin must be asserted, and the SCK pin must be in the low state in order for a Hold
condition to start. A Hold condition pauses serial communication only and does not have an
Low
effect on internally self-timed operations such as a program or erase cycle. Please refer to
“Hold” on page 27 for additional details on the Hold operation.
The HOLD pin is internally pulled-high and may be left floating if the Hold function will not be
used. However, it is recommended that the HOLD pin also be externally connected to V_CC
whenever possible.
V_CC
DEVICE POWER SUPPLY: The V_CC pin is used to supply the source voltage to the device.
Operations at invalid V_CC voltages may produce spurious results and should not be attempted.
-
GND
GROUND: The ground reference for the power supply. GND should be connected to the system
ground.
-
Type
Input/
Output
Input
Input
Power
Power
Figure 2-1. 8-SOIC Top View
CS 1
SO 2
WP 3
GND 4
8 VCC
7 HOLD
6 SCK
5 SI
Figure 2-3. 8-UDFN (Top View)
CS 1
SO 2
WP 3
GND 4
8 VCC
7 HOLD
6 SCK
5 SI
Figure 2-2. 8-TSSOP Top View
CS 1
SO 2
WP 3
GND 4
8 VCC
7 HOLD
6 SCK
5 SI
AT25DF011
3
DS-25DF011–032A–4/2014