AMC8500 Datasheet, PDF (23/27 Pages) List of Unclassifed Manufacturers – TWO PHASE VARIABLE SPEED FAN MOTOR CONTROLLER

Preliminary Specification
aMC8500
Figure 41- Digital Pulse Speed Control with Programmable Minimum Speed Set
12 V
12
3
4
5
7
8
9
453
909 ⁶
6.2 k
Pulse
2.7 k
36 k
C1
0.1
10
Input 10 k
Q1
Reference
Op Amp
Under Voltage
Lockout
Hall Amplifier
Non-Overlap
Commutation
Fault Timer
Power Down
Kick Start
Oscillator
R
Min Speed
Comp
PWM Comp
PWM
Logic
Digital
Detector
H
SN
M
N
S
16
1
Motor
Drives
Thermal
Shutdown
Current
Limit
Latch
R
Q
S
10 μA
Current Limit
Comp
15
13
2
10 nF
11
14
The programmable minimum speed set feature can be preserved when controlling motor speed from a varying duty cycle pulse. The
above circuit uses transistor Q1, capacitor C1 and the Reference to convert the digital control signal to an analog voltage. With the
resistor values shown, the voltage at Pin 10 varies between 3.0 V with Q1 off and 1.0 V with Q1 on, which represents a PWM on-time of
0% and 100% respectively. The value of capacitor C1 is dependent upon the pulse frequency and should be sized be so that the ripple
at Pin 10 is less than 10 mV. The Op Amp is not required in this application and is connected as a unity gain follower with the non-
inverting grounded. The Minimum Speed Set input is programmed for a PWM on-time of approximately 33%. Since the Reference is
always required, the programming resistors also provide a load that exceeds 2.0 mA for disabling the automatic power down feature.
Figure 42- Speed Control Alarm
5
R2
7
V_th
Speed
Alarm
R1 8
Output
V_OH
9
V_OL
6
3.0 V
V_th
0V
Speed
Control
Input
10
Reference
Op Amp
Oscillator
R
Pin 11 = Gnd
V_th = 1 + 0.02(%ton)
Pin 11 = Open
V_th = 3 - 0.02(%ton)
R2/R1 = (V_ref / V_th) - 1
R2 ⁵
V_th
R1 ⁷
Min Speed
Comp
PWM Comp
Speed
8
Alarm
Output
V_OH
9
V_OL
3.0 V
6
V_th
0V
Speed
Control
Input
10
Reference
Op Amp
Oscillator
R
Min Speed
Comp
PWM Comp
The Op Amp and Reference can be used to generate a speed control alarm signal. Resistors R1 and R2 divide down the Reference
output voltage to set trip threshold V_th. The Op Amp compares the speed control input voltage to the trip threshold and the output
changes state when it is crossed. In the circuit on the left, the speed alarm output transitions from a low to high state as the Speed
Control Input voltage increases. With the circuit on the right, the speed alarm output transitions from a high to low state as the speed
control input voltage increases. Threshold hysteresis can be added to the circuit on the right by placing a resistor from Pin 9 to Pin 7.
© Andigilog, Inc. 2006
- 23 -
www.andigilog.com
August 2006 - 70A04018