LM3S815_06 Datasheet, PDF (203/412 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S815 Data Sheet
11.1
11.2
11.2.1
Block Diagram
Figure 11-1. ADC Module Block Diagram
Trigger Events
Comparator
GPIO (PB4)
Timer
SS3
PWM
Comparator
GPIO (PB4)
Timer
SS2
PWM
Comparator
GPIO (PB4)
Timer
SS1
PWM
Comparator
GPIO (PB4)
Timer
SS0
PWM
SS0 Interrupt
SS1 Interrupt
SS2 Interrupt
SS3 Interrupt
ADCEMUX
ADCPSSI
Control/Status
ADCACTSS
ADCOSTAT
ADCUSTAT
ADCSSPRI
Interrupt Control
ADCIM
ADCRIS
ADCISC
Sample
Sequencer 0
ADCSSMUX0
ADCSSCTL0
ADCSSFSTAT0
Sample
Sequencer 1
ADCSSMUX1
ADCSSCTL1
ADCSSFSTAT1
Sample
Sequencer 2
ADCSSMUX2
ADCSSCTL2
ADCSSFSTAT2
Sample
Sequencer 3
ADCSSMUX3
ADCSSCTL3
ADCSSFSTAT3
Analog-to-Digital
Converter
FIFO Block
ADCSSFIFO0
ADCSSFIFO1
ADCSSFIFO2
ADCSSFIFO3
Analog Inputs
Functional Description
The Stellaris ADC collects sample data by using a programmable sequence-based approach
instead of the traditional single or double-sampling approach found on many ADC modules. Each
sample sequence is a fully programmed series of consecutive (back-to-back) samples, allowing
the ADC to collect data from multiple input sources without having to be re-configured or serviced
by the controller. The programming of each sample in the sample sequence includes parameters
such as the input source and mode (differential versus single-ended input), interrupt generation on
sample completion, and the indicator for the last sample in the sequence.
Sample Sequencers
The sampling control and data capture is handled by the Sample Sequencers. All of the
sequencers are identical in implementation except for the number of samples that can be captured
and the depth of the FIFO. Table 11-1 shows the maximum number of samples that each
Sequencer can capture and its corresponding FIFO depth. In this implementation, each FIFO entry
is a 32-bit word, with the lower 10 bits containing the conversion result.
Table 11-1. Samples and FIFO Depth of Sequencers
Sequencer
SS3
SS2
SS1
SS0
Number of
Samples
1
4
4
8
Depth of FIFO
1
4
4
8
October 8, 2006
203
Preliminary