UM1472 Datasheet, PDF (20/42 Pages) List of Unclassifed Manufacturers – Discovery kit for STM32F407/417 lines

Hardware and layout
UM1472
4.11 Solder bridges
Bridge
State⁽¹⁾
Table 4. Solder bridges
Description
OFF
SB13,14 (X2 crystal)⁽²⁾
ON
SB3,5,7,9 (Default) ON
SB2,4,6,8 (Reserved) OFF
SB15,16
(X3 crystal)
SB1
(B2-RESET)
SB20
(B1-USER)
SB17
(VDD powered from
3V)
OFF
ON
ON
OFF
ON
OFF
OFF
ON
SB11 (NRST)
ON
OFF
SB12 (SWO)
SB10 (STM_RST)
ON
OFF
OFF
ON
SB18 (BOOT0)
ON
OFF
SB19 (BOOT1)
OFF
ON
X2, C14, C15, R24 and R25 provide a clock.
PH0, PH1 are disconnected from P2.
PH0, PH1 are connected to P2 (R24, R25 and R68 must not be fitted).
Reserved, do not modify.
Reserved, do not modify.
X3, C16, C27, R21 and R22 deliver a 32 KHz clock.
PC14, PC15 are not connected to P2.
PC14, PC15 are only connected to P2. Remove only R21, R22
B2 pushbutton is connected to the NRST pin of the STM32F407VGT6 MCU.
B2 pushbutton is not connected the NRST pin of the STM32F407VGT6 MCU.
B1 pushbutton is connected to PA0.
B1 pushbutton is not connected to PA0.
VDD is not powered from 3V, depends on JP1 jumper.
VDD is permanently powered from 3V, JP1 jumper has no effect.
NRST signal of the CN2 connector is connected to the NRST pin of the
STM32F407VGT6 MCU.
NRST signal of the CN2 connector is not connected to the NRST pin of the
STM32F407VGT6 MCU.
SWO signal of the CN2 connector is connected to PB3.
SWO signal is not connected.
No incidence on STM32F103C8T6 (ST-LINK/V2) NRST signal.
STM32F103C8T6 (ST-LINK/V2) NRST signal is connected to GND.
BOOT0 signal of the STM32F407VGT6 MCU is held low through a 510 ohm
pull-down resistor.
BOOT0 signal of the STM32F407VGT6 MCU is held high through a 10 Kohm
pull-up resistor.
The BOOT1 signal of the STM32F407VGT6 MCU is held high through a
10 Kohm pull-up resistor.
The BOOT1 signal of the STM32F407VGT6 MCU is held low through a 510 ohm
pull-down resistor.
1. Default SBx state is shown in bold.
2. SB13 and SB14 are OFF to allow the user to choose between MCO and X2 crystal for clock source.
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