LM3S611_06 Datasheet, PDF (185/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S611 Data Sheet
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014
This register is the masked interrupt status register. The value of this register is the logical AND of
the raw interrupt bit and the Watchdog interrupt enable bit.
Watchdog Masked Interrupt Status (WDTMIS)
Offset 0x014
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
WDTMIS
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
Name
reserved
0
WDTMIS
Type
RO
RO
Reset
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Watchdog Masked Interrupt Status
Gives the masked interrupt state (after masking) of the
WDTINTR interrupt.
October 8, 2006
185
Preliminary