English
Language : 

AC1040F Datasheet, PDF (16/37 Pages) List of Unclassifed Manufacturers – Ultra Low Power 10/100 Quad RMII Ethernet Transceiver
AC104QF
Ultra Low Power 10/100 Quad RMII Ethernet Transceiver
When the Phy receives 3 identical link code words
(ignoring acknowledge bit) from its link partner, it
stores these code words in Reg. 5, sets the
acknowledge bit it the generated FLPs, and waits to
receive 3 identical code word with the acknowledge
bit set from the link partner. Once this occurs the
Phy configures itself to the highest technology that is
common to both ends. The technology priorities are:
1. 100Base-TX, full-duplex
2. 100Base-TX, half-duplex
3. 10Base-T, full-duplex
4. 10Base-T half-duplex.
Once the ANeg is complete, Reg. 1.5 is set, Reg.
1.[14:11] reflects negotiated speed and duplex mode,
and the Phy enters the negotiated transmission and
reception state. This state will not change until link
is lost or the Phy is reset through either hardware or
software, or the restart negotiation bit (Reg. 0.9) is
set.
PARALLEL DETECTION
Because there are many devices in the field that do
not support the ANeg process, but must still be
communicated with, it is necessary to detect and link
through the Parallel Detection process.
presented to the PCS in 5 bits symbol format. This
loopback is used to check the operation of the 5-bit
symbol decoder and the phase locked loop circuitry.
In Local Loopback, the SD output is forced to logic
one and TXOP/N outputs are tri-stated.
In Remote Loopback, incoming data is passed
through the equalizer and clock recovery, then looped
back to the NRZI/MLT3 converter and then to the
transmit driver. This loopback is used to ensure the
device’s connection on the media side. It also checks
the operation of the device's internal adaptive
equalizer, phase locked loop circuit, and wave-shaper
synthesizer. During Remote Loopback, signal detect
(SD) output is forced to logic zero.
Cable Length Indicator
The Phy can detect the approximate length of the
cable it’s attached and display the result in Reg.
20.[7:4]. A reading of [0000] translates to < 10m
cable used, [0001] translates to ~ 10 meter of cable,
and [1111] translates to 150 meter cable. The cable
length value can be used by the network manage to
determine the proper connectivity of the cable and to
manage the cable plant distribution
RESET AND POWER
The parallel detection circuit is enabled in the
absence of FLPs. The circuit is able to detect:
• Normal Link Pulse (NLP)
• 10Base-T receive data
• 100Base-TX idle
The Phy can be reset in three ways:
1. During initial power on.
2. Hardware Reset: A logic low signal of 150 µs
pulse width is applied to RST* pin.
3. Software Reset: Write a one to SMI Reg. 0.15.
The mode of operation gets configured based on the
technology of the incoming signal. If any of the
above is detected, the device automatically
configures to match the detected operating speed in
the half duplex mode. This ability allows the device
to communicate with the legacy 10Base-T and
100Base-TX systems, while maintaining the
flexibility of Auto-Negotiation.
The power consumption of the device is significantly
reduced due to its built-in power management
features. Separate power supply lines are used to
power the 10BaseT circuitry and the 100BaseTX
circuitry. Therefore, the two circuits can be turned-
on and turned-off independently. When the Phy is set
to operate in 100Base-TX mode, the 10Base-T
circuitry is powered down, and vice versa.
DIAGNOSTICS
Loopback Operation
Local Loopback and Remote Loopback are provided
for testing purpose. They can be enabled by write to
either Reg. 0.14 (LPBK) or Reg. 21.3 (EN_RPBK).
The Local Loopback routes transmitted data through
the transmit path back to the receiving path’s clock
and data recovery module. The loopback data are
The following power management features are
supported:
1. Power down mode: This can be achieved by
writing to Reg. 0.11 or pulling PWRDN pin
high. During power down mode, the device is
still be able to interface through the MDC/MDIO
management interface.
2. Energy detect / power saving mode: Energy
detect mode turns off the power to select internal
circuitry when there is no live network
2055 Gateway Parkway Suite 700, San Jose, CA 95110 (408) 453-3700 (www.altimacom.com)
Altima Communications Inc. reserves the right to make changes to this document without notice.
Document Revision 4.0
Page 16 of 37