NUC126LE4AE Datasheet, PDF (15/139 Pages) List of Unclassifed Manufacturers – 32-BIT MICROCONTROLLER

NUC126
SPI Mode
I²S Mode
SPI_CLK
I2S_BCLK
SPI_SS
SPI_MOSI
I2S_LRCLK
I2S_DO
SPI_MISO
I2S_DI
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I2S_MCLK
SPI Mode
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I²S Mode
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 I²C
Supports Master or Slave mode operation
Configurable bit length of a transfer word from 8 to 32-bit
Provides separate 4-/8-level depth transmit and receive FIFO buffers
Supports MSB first or LSB first transfer sequence
Supports Byte Reorder function
Supports PDMA transfer
Supports Master or Slave mode operation
Capable of handling 8-, 16-, 24- and 32-bit word sizes in I2S mode
Provides separate 4-level depth transmit and receive FIFO buffers in I2S mode
Supports monaural and stereo audio data in I2S mode
Supports PCM mode A, PCM mode B, I2S and MSB justified data format in I2S
mode
Supports PDMA transfer
Supports up to two sets of I2C device
Supports Master/Slave mode
Supports bidirectional data transfer between masters and slaves
Supports multi-master bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of serial data on
the bus
Serial clock synchronization allows devices with different bit rates to communicate via one
serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend and resume
serial transfer
Supports 14-bit time-out counter requesting the I2C interrupt if the I2C bus hangs up and
timer-out counter overflows
Programmable clocks allow versatile rate control
Supports multiple address recognition, four slave address with mask option
Supports two-level buffer function
Supports setup/hold time programmable
Supports wake-up function
USB 2.0 FS Device Controller
Crystal-less USB 2.0 FS Device
Compliant to USB specification version 2.0
On-chip USB Transceiver
– Supports Control, Bulk In/Out, Interrupt and Isochronous transfers
– Auto suspend function when no bus signaling for 3 ms
– Supports USB 2.0 Link Power Management (LPM)
– Provides 8 programmable endpoints
– Supports 512 Bytes internal SRAM as USB buffer
– Provides remote wake-up capability
– On-chip 5V to 3.3V LDO for USB PHY
 ADC
May 05, 2017
Page 15 of 139
Rev 1.00