HT80C51 Datasheet, PDF (15/132 Pages) List of Unclassifed Manufacturers – User Manual Document Information

HT80C51 User Manual
Memory Organization – Special Function Registers
Handshake Solutions
SP
Stack Pointer
addr = 81H reset value = 07H
bits
7
6
5
4
3
2
1
0
SP
2.5.5. Data Pointer DPTR DPH DPL
The Data Pointer (DPTR) consists of a high byte (DPH) and a low byte (DPL). Its intended function is to
hold a 16-bit address for MOVX and MOVC instructions. It may be manipulated as a 16-bit register or
as two independent 8-bit registers.
DPH
Data Pointer High byte
bits
7
6
5
addr = 83H
4
3
2
DPH
reset value = 00H
1
0
DPL
Data Pointer Low byte
bits
7
6
5
addr = 82H
4
3
2
DPL
reset value = 00H
1
0
2.5.5.1. Dual data pointer (option HT80C51_CPU_DUALDPTR)
Optional two data pointer registers can be implemented, DPTR0 and DPTR1. Only one data pointer can
be used at a time. This can be selected by bit DPS in SFR PCON (see below).
All instructions using the DPTR, DPL or DPH use either DPTR0 or DPTR1 as selected by SFR bit DPS.
The DPS bit should be saved by software when switching between DPTR0 and DPTR1 within procedures
or interrupt routines.
2.5.6. Power Saving Modes PCON
The HT80C51 has two power reducing modes, Idle and Power Down. The input through which backup
power is supplied during these operations is VDD.
In the Idle mode (IDL = 1), the oscillator continues to run and the Interrupt, Serial Port, and Timer
blocks continue to be clocked, but the clock signal is gated off to the CPU.
In Power Down (PD = 1), the oscillator is frozen.
Since switching on or off the oscillator is done outside the microcontroller, dedicated output pins indi-
cate idle mode (cpu_idle_o) and power down (cpu_powerdown_o). External circuits needs to ob-
serve these signals to switch off the clocks (in power down) or to change the supply voltage.
Setting bits in Special Function Register PCON activate the Idle and Power Down Modes.
© Philips Electronics N.V. 2005
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