LM3S328 Datasheet, PDF (115/371 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S328 Data Sheet
8.2.2
8.2.3
Figure 8-3. GPIODATA Write Example
ADDR[9:2] 9 8 7 6 5 4 3 2 1 0
0x098 0 0 1 0 0 1 1 0 0 0
0xEB 1 _{1 1} 0 _{1 0} 1 ₁
GPIODATA _{u u 1 u u 0 1 u}
76543210
During a read, if the address bit associated with the data bit is set to 1, the value is read. If the
address bit associated with the data bit is set to 0, it is read as a zero, regardless of its actual
value. For example, reading address GPIODATA + 0x0C4 yields as shown in Figure 8-4.
Figure 8-4. GPIODATA Read Example
ADDR[9:2]
0x0C4
98765432 10
0011000100
GPIODATA 1 0 1 1 1 1 1 0
Returned Value 0 0 1 1 0 0 0 0
76543210
Data Direction
The GPIO Direction (GPIODIR) register (see page 121) is used to configure each individual pin
as an input or output.
Interrupt Operation
The interrupt capabilities of each GPIO port are controlled by a set of seven registers. With these
registers, it is possible to select the source of the interrupt, its polarity, and the edge properties.
When one or more GPIO inputs cause an interrupt, a single interrupt output is sent to the interrupt
controller for the entire GPIO port. For edge-triggered interrupts, software must clear the interrupt
to enable any further interrupts. For a level-sensitive interrupt, it is assumed that the external
source holds the level constant for the interrupt to be recognized by the controller.
Three registers are required to define the edge or sense that causes interrupts:
„ GPIO Interrupt Sense (GPIOIS) register (see page 122)
„ GPIO Interrupt Both Edges (GPIOIBE) register (see page 123)
„ GPIO Interrupt Event (GPIOIEV) register (see page 124)
Interrupts are enabled/disabled via the GPIO Interrupt Mask (GPIOIM) register (see page 125).
When an interrupt condition occurs, the state of the interrupt signal can be viewed in two locations:
the GPIO Raw Interrupt Status (GPIORIS) and GPIO Masked Interrupt Status (GPIOMIS)
registers (see pages 126 and 127). As the name implies, the GPIOMIS register only shows
interrupt conditions that are allowed to be passed to the controller. The GPIORIS register indicates
that a GPIO pin meets the conditions for an interrupt, but has not necessarily been sent to the
controller.
April 27, 2007
115
Preliminary