YC358TJK-074K7L Datasheet, PDF (11/16 Pages) List of Unclassifed Manufacturers – All thick film types of chip resistors have a rectangular ceramic body.

Chip Resistor Surface Mount ^{Thick film technology INTRODUCTION}
Product specification 11
16
DEFINITIONS OF PULSES
SINGLE PULSE
The resistor is considered to be operating under
single pulse conditions if, during its life, it is loaded
with a limited number (approximately 1,500) of
pulses over long time intervals (greater than one
hour).
REPETITIVE PULSE
The resistor is operating under repetitive pulse
conditions if it is loaded by a continuous train of
pulses of similar power.
The dashed line in Fig. 12 shows the observed
maximum load for the Size 1206 chip resistors under
single-pulse loading.
More usually, the resistor must withstand a
continuous train of pulses of repetition time ‘t_p’
during which only a small resistance change is
acceptable. This resistance change (∆R/R) is equal to
the change permissible under continuous load
conditions. The continuous pulse train and small
permissible resistance change reduces the maximum
handling capability.
The continuous pulse train maximum handling
capacity of chip resistors has been determined
experimentally.
Measurements have shown that the handling capacity
varies with the resistive value applied.
However, maximum peak pulse voltages as indicated
in Fig. 13, should not be exceeded.
DETERMINATION OF PULSE-LOAD
The graphs in Figs 12 and 13 may be used to
determine the maximum pulse-load for a resistor.
For repetitive rectangular pulses:

Vˆ_i2
R
must be lower than the value of Pˆ_max
given
by the solid lines of Fig. 12 for the applicable
value of t_i and duty cycle t_p/t_i.
 Vˆ _i must be lower than the value of Vˆ_max given
in Fig. 13 for the applicable value of t_i.
For repetitive exponential pulses:
 As for rectangular pulses, except that t_i = 0.5 .
For single rectangular pulses:

Vˆ_i2
R
must be lower than the Pˆ_max
given by the
dashed line of Fig. 12 for the applicable value of
t_i.
 Vˆ _i must be lower than the value of Vˆ_max given
in Fig. 13 for the applicable value of t_i.
Mar 25, 2008 V.7
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