RFM73P Datasheet, PDF (10/25 Pages) List of Unclassifed Manufacturers – Low Power High Performance 2.4 GHz GFSK Transceiver Module

RFM73P-S2 V2.0
the PTX goes directly to standby-I mode after
transmitting the packet and the PRX does not
transmit an ACK packet when it receives the
packet.
5.1.4 Payload
The payload is the user defined content of the
packet. It can be 0 to 32 bytes wide, and it is
transmitted on-air as it is uploaded
(unmodified) to the device.
The RFM73P-S2 provides two alternatives for
handling payload lengths, static and dynamic
payload length. The static payload length of
each of six data pipes can be individually set.
The default alternative is static payload length.
With static payload length all packets between
a transmitter and a receiver have the same
length. Static payload length is set by the
RX_PW_Px registers. The payload length on
the transmitter side is set by the number of
bytes clocked into the TX_FIFO and must
equal the value in the RX_PW_Px register on
the receiver side. Each pipe has its own
payload length.
Dynamic Payload Length (DPL) is an
alternative to static payload length. DPL
enables the transmitter to send packets with
variable payload length to the receiver. This
means for a system with different payload
lengths it is not necessary to scale the packet
length to the longest payload.
With DPL feature the RFM73P-S2 can decode
the payload
length of
the
received packet
automatically
instead of using the RX_PW_Px registers. The
MCU can read the length of the received
payload by using the command:
R_RX_PL_WID.
In order to enable DPL the EN_DPL bit in the
FEATURE register must be set. In RX mode
the DYNPD register has to be set. A PTX that
transmits to a PRX with DPL enabled must
have the DPL_P0 bit in DYNPD set.
5.1.5 CRC
The CRC is the error detection mechanism in
the packet. The number of bytes in the CRC is
set by the CRCO bit in the CONFIG register.
It may be either 1 or 2 bytes and is calculated
over the address, Packet Control Field, and
Payload.
The polynomial for 1 byte CRC is X⁸ + X² +
X + 1. Initial value is 0xFF.
The polynomial for 2 byte CRC is X¹⁶ + X¹² +
X⁵ + 1. Initial value is 0xFFFF.
No packet is accepted by receiver side if the
CRC fails.
5.2 Packet Handling
RFM73P-S2 uses burst mode for
payload transmission and receive.
The transmitter fetches payload from TX FIFO,
automatically assembles it into packet and
transmits the packet in a very short burst
period with 1Mbps or 2Mbps air data rate.
After transmission, if the PTX packet has the
NO_ACK flag set, RFM73P-S2 sets TX_DS
and gives an active low interrupt IRQ to MCU.
If the PTX is ACK packet, the PTX needs
receive ACK from the PRX and then asserts
the TX_DS IRQ.
The receiver automatically validates and
disassembles received packet, if there is a
valid packet within the new payload, it will
write the payload into RX FIFO, set RX_DR
and give an active low interrupt IRQ to MCU.
When auto acknowledge is enabled
(EN_AA=1), the PTX devicewill
automatically wait for acknowledge packet
after transmission, and re-transmit original
packet with the delay of ARD until an
acknowledge packet is received or the number
of re-transmission exceeds a threshold ARC. If
the later one happens, RFM73P-S2 will set
MAX_RT and give an active low interrupt
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