NUC100VE3AN Datasheet, PDF (10/86 Pages) List of Unclassifed Manufacturers – ARM Cortex™-M0 32-BIT MICROCONTROLLER

NuMicro™ NUC100 Data Sheet
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• I²C
Full duplex synchronous serial data transfer
Variable length of transfer data from 1 to 32 bits
MSB or LSB first data transfer
Rx and Tx on both rising or falling edge of serial clock independently
2 slave/device select lines when it is as the master, and 1 slave/device select line
when it is as the slave
Support byte suspend mode in 32-bit transmission
Support PDMA mode
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• I²S
Up to two sets of I²C device
Master/Slave mode
Bidirectional data transfer between masters and slaves
Multi-master bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer
Programmable clocks allow versatile rate control
Support multiple address recognition (four slave address with mask option)
– Interface with external audio CODEC
– Operate as either master or slave mode
– Capable of handling 8-, 16-, 24- and 32-bit word sizes
– Mono and stereo audio data supported
– I²S and MSB justified data format supported
– Two 8 word FIFO data buffers are provided, one for transmit and one for receive
– Generates interrupt requests when buffer levels cross a programmable boundary
– Support two DMA requests, one for transmit and one for receive
• PS/2 Device Controller
– Host communication inhibit and request to send detection
– Reception frame error detection
– Programmable 1 to 16 bytes transmit buffer to reduce CPU intervention
– Double buffer for data reception
– S/W override bus
• EBI (External bus interface) support (NuMicro™ NUC100/NUC120 Low Density 64-pin
Package Only)
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• ADC
Accessible space: 64KB in 8-bit mode or 128KB in 16-bit mode
Support 8-/16-bit data width
Support byte write in 16-bit data width mode
– 12-bit SAR ADC with 600K SPS
– Up to 8-ch single-end input or 4-ch differential input
– Single scan/single cycle scan/continuous scan
– Each channel with individual result register
– Scan on enabled channels
– Threshold voltage detection
– Conversion start by software programming or external input
– Support PDMA mode
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Publication Release Date: Jan. 2, 2012
Revision V2.03