VL-MM7-2SBN Datasheet, PDF (1/12 Pages) List of Unclassifed Manufacturers – 2GB 256Mx64 DDR3 SDRAM NON-ECC UNBUFFERED SODIMM 204-PIN

PART NO.:
Product Specifications
VL47B5663A-F8SE
REV: 1.0
General Information
2GB 256Mx64 DDR3 SDRAM NON-ECC UNBUFFERED SODIMM 204-PIN
Description
The VL47B5663A is a 256Mx64 DDR3 SDRAM high density SODIMM. This dual rank memory module consists of
sixteen CMOS 128Mx8 bits with 8 banks DDR3 Synchronous DRAMs in BGA packages and a 2K EEPROM with
thermal sensor in an 8-pin MLF package. This module is a 204-pin small-outline dual in-line memory module and is
intended for mounting into an edge connector socket. Decoupling capacitors are mounted on the printed circuit board
for each DDR3 SDRAM.
Features
• 204-pin, small-outline dual in-line memory module (SODIMM)
• Fast data transfer rate: PC3-8500
• VDD = VDDQ = 1.5V +/-0.075V
• JEDEC standard 1.5V +/-0.075V I/O (SSTL_15 compatible)
• VDDSPD = 3.0V to 3.6V
• Eight internal component banks for concurrent operation
• 8-bit pre-fetch architecture
• Bi-directional differential data-strobe
• Nominal and dynamic on-die termination (ODT)
• ZQ calibration support
• Programmable CAS# latency: 7 (DDR3-1066)
• Programmable burst; length (8)
• Average refresh period 7.8 us
• Asynchronous reset
• Fly-by topology
• On board terminated command, address, and control bus
• Serial presence detect (SPD) EEPROM with thermal sensor
• Thermal sensor range: -40^oC to +125^oC (Max +/-3^oC accuracy)
• JEDEC pinout
• Gold edge contacts
• Lead-free, RoHS compliant
• PCB: Height 30.00mm (1.181”), double sided component
• Operating temperature (TOPER): - Commercial (0^oC <= Tc <= 95^oC)
- Industrial (-40^oC <= Tc <= 95^oC)
Notes: Double refresh rate is required when 85^oC < TOPER <= 95^oC.
TOPER is DRAM case temperature (Tc)
Order Information:
VL47B5663A - F8 S E - X
DRAM component: Samsung K4B1G0846E-BCH9
OPERATING TEMPERATURE
None: Commercial
S1: Industrial screening
DRAM DIE
E-DIE
DRAM MANUFACTURER
S - SAMSUNG
MODULE SPEED
F8: PC3-8500 @ CL7
VL: Lead-free/RoHS
Pin Description
Pin Name
A0~A13
A10/AP
A12/BC#
BA0~BA2
DQ0~DQ63
DQS0~DQS7
DQS0#~DQS7#
DM0~DM7
CK0, CK0#,
CK1, CK1#
ODT0, ODT1
CKE0, CKE1
CS0#, CS1#
RAS#
CAS#
WE#
RESET#
VDD
VSS
SA0~SA1
SDA
SCL
EVENT#
VREFCA
VREFDQ
VDDSPD
VTT
NC
Function
Address Inputs
Address Input/ Autoprecharge
Address Input/ Burst Chop
Bank Address Inputs
Data Input/Output
Data Strobes
Data Strobes Complement
Data Masks
Clock Inputs
On-die Termination Control
Clock Enables
Chip Selects
Row Address Strobes
Column Address Strobes
Write Enable
Register and SDRAM Control
Voltage Supply
Ground
SPD Address
SPD Data Input/Output
SPD Clock Input
Temperature Event Output
Reference Voltage for CA
Reference Voltage for DQ
SPD Voltage Supply
Termination Voltage
No Connect
Tel [phone] – 30052 Tomas, Rancho Santa Margarita, CA 92688 USA – www.virtium.com
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