|
SGL04G72C1BB1SA-CCRT Datasheet, PDF (1/17 Pages) List of Unclassifed Manufacturers – 4096MB DDR3 – SDRAM unbuffered ECC VLP Mini-UDIMM | |||
|
Data Sheet
Rev. 1.00 25.07.2012
4096MB DDR3 â SDRAM unbuffered ECC VLP Mini-UDIMM
244 Pin ECC Mini-UDIMM
Features:
SGL04G72C1BB1SA-xxRT
4GByte in FBGA Technology
RoHS compliant
Options:
ï§ Data Rate / Latency
DDR3 1333 MT/s CL9
DDR3 1600 MT/s CL11
Marking
-CC
-DC
ï§ Module density
4096MB with 9 dies and 1 ranks
ï§ Standard Grade (TA)
(TC)
ï§ Grade W
(TA)
(TC)
0°C to 70°C
0°C to 85°C
-40°C to 85°C
-40°C to 95°C *)
*) The refresh rate has to be doubled when 85°C<TC<95°C
Environmental Requirements:
ï§ Operating temperature (ambient)
Standard Grade
0°C to 70°C
W-Grade
-40°C to 85°C
-40°C to 85°C
ï§ Operating Humidity
10% to 90% relative humidity, noncondensing
ï§ Operating Pressure
105 to 69 kPa (up to 10000 ft.)
ï§ Storage Temperature
-55°C to 100°C
ï§ Storage Humidity
5% to 95% relative humidity, noncondensing
ï§ Storage Pressure
1682 PSI (up to 5000 ft.) at 50°C
ï§ 244-pin 72-bit DDR3 ECC VLP Mini-UDIMM module
ï§ Module organization: single rank 512M x 72
ï§ VDD = 1.5V ±0.075V, VDDQ 1.5V ±0.075V
ï§ 1.5V I/O ( SSTL_15 compatible)
ï§ Fly-by-bus with termination for C/A & CLK bus
ï§ On-board I2C temperature sensor with integrated serial
presence-detect (SPD) EEPROM
ï§ Gold-contact pad
ï§ This module is fully pin and functional compatible to the
JEDEC PC3-10600 DDR3 SDRAM Mini-UDIMM design spec.
and JEDEC- Standard MO-244 R/C E. (see www.jedec.org)
ï§ The pcb and all components are manufactured according to
the RoHS compliance specification
[EU Directive 2002/95/EC Restriction of Hazardous
Substances (RoHS)]
DDR3 - SDRAM component Samsung K4B4G0846B
ï§ 512Mx8 DDR3 SDRAM in PG-TFBGA-78 package
ï§ 8-bit prefetch architecture
ï§ Programmable CAS Latency, CAS Write Latency, Additive
Latency, Burst Length and Burst Type.
ï§ On-Die-Termination (ODT) and Dynamic ODT for improved
signal integrity.
ï§ Refresh, Self Refresh and Power Down Modes.
ï§ ZQ Calibration for output driver and ODT.
ï§ System Level Timing Calibration Support via Write Leveling
and Multi Purpose Register (MPR) Read Pattern.
Figure: mechanical dimensions1
82.00
Swissbit AG
Industriestrasse 4
CH â 9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
1if no tolerances specified ± 0.15mm
www.swissbit.com
eMail: info@swissbit.com
Page 1
of 17
|
▷ |