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P9006EDG Datasheet, PDF (1/5 Pages) List of Unclassifed Manufacturers – P-Channel Logic Level Enhancement
NIKO-SEM
P-Channel Logic Level Enhancement
Mode Field Effect Transistor (Preliminary)
P9006EDG
TO-252
Lead-Free
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
-60V
90mƸ
-8A
D
G
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
TC = 25 °C
TC = 70 °C
Power Dissipation
TC = 25 °C
TC = 70 °C
Operating Junction & Storage Temperature Range
Lead Temperature (1/16” from case for 10 sec.)
VDS
VGS
ID
IDM
PD
Tj, Tstg
TL
1. GATE
2. DRAIN
3. SOURCE
LIMITS
-60
±20
-7
-6
-30
28
18
-55 to 150
275
UNITS
V
V
A
W
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction-to-Case
RθJc
Junction-to-Ambient
RθJA
1Pulse width limited by maximum junction temperature.
2Duty cycle ≤ 1%
TYPICAL
MAXIMUM
3
75
UNITS
°C / W
°C / W
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
LIMITS
UNIT
MIN TYP MAX
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current1
V(BR)DSS
VGS(th)
VGS = 0V, ID = -250µA
VDS = VGS, ID = -250µA
-60
V
-1 -2 -3
IGSS
VDS = 0V, VGS = ±20V
±250 nA
VDS = -48V, VGS = 0V
IDSS
VDS = -44V, VGS = 0V, TJ = 125 °C
1
µA
10
ID(ON)
VDS = -5V, VGS = -10V
-32
A
OCT-21-2004
1