P3055LDG Datasheet, PDF (1/4 Pages) List of Unclassifed Manufacturers – N-Channel Logic Level Enhancement Mode Field Effect Transistor

NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P3055LDG
TO-252 (DPAK)
Lead-Free
PRODUCT SUMMARY
V_(BR)DSS
R_DS(ON)
25
50mƸ
I_D
12A
D
G
S
1. GATE
2. DRAIN
3. SOURCE
ABSOLUTE MAXIMUM RATINGS (T_C = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current¹
T_C = 25 °C
T_C = 100 °C
Avalanche Energy
Repetitive Avalanche Energy²
L = 0.1mH
L = 0.05mH
Power Dissipation
T_C = 25 °C
T_C = 100 °C
Operating Junction & Storage Temperature Range
Lead Temperature (¹/₁₆” from case for 10 sec.)
V_GS
I_D
I_DM
E_AS
E_AR
P_D
T_j, T_stg
T_L
LIMITS
±20
12
8
45
60
3
48
20
-55 to 150
275
UNITS
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction-to-Case
R_θJC
Junction-to-Ambient
R_θJA
Case-to-Heatsink
R_θCS
1_{Pulse width limited by maximum junction temperature.}
2_{Duty cycle ≤ 1%}
TYPICAL
1
MAXIMUM
3
75
UNITS
°C / W
ELECTRICAL CHARACTERISTICS (T_C = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V_(BR)DSS
V_GS(th)
I_GSS
I_DSS
STATIC
V_GS = 0V, I_D = 250µA
V_DS = V_GS, I_D = 250µA
V_DS = 0V, V_GS = ±20V
V_DS = 20V, V_GS = 0V
V_DS = 20V, V_GS = 0V, T_J = 125 °C
LIMITS
UNIT
MIN TYP MAX
25
V
0.8 1.2 2.5
±250 nA
25
µA
250
1
AUG-17-2004