MTV112A Datasheet, PDF (1/20 Pages) List of Unclassifed Manufacturers – 8051 Embedded CRT Monitor Controller MASK Version

MYSON
TECHNOLOGY
MTV112A
(Rev 1.9)
8051 Embedded CRT Monitor Controller
MASK Version
FEATURES
l 8051 core.
l 384-bytes internal RAM.
l 16K-bytes program Mask ROM.
l 14-channels 10V open-drain PWM DAC, 10 dedicated channels and 4 channels shared with I/O pin.
l 28 bi-direction I/O pin,12 dedicated pin,12 shared with DAC,4 shared with DDC/IIC interface.
l 5-output pin shared with H/V sync output and self test output pins.
l SYNC processor for composite separation, polarity and frequency check, and polarity adjustment.
l Built-in monitor self-test pattern generator.
l Built-in low power reset circuit.
l One slave mode IIC interface and one master mode IIC interface.
l IIC interface for DDC1/DDC2B and EEPROM; only one EEPROM needed to store DDC1/DDC2B and
display mode information.
l Dual 4-bit ADC or 4 channel 6-bit ADC.
l Watchdog timer with programmable interval.
l 40-pin PDIP and 44-pin PLCC package.
GENERAL DESCRIPTION
The MTV112A micro-controller is an 8051 CPU core embedded device specially tailored to CRT monitor
applications. It includes an 8051 CPU core, 384-byte SRAM, 14 built-in PWM DACs, DDC1/DDC2B interface,
24Cxx series EEPROM interface, A/D converter and a 16K-bytes internal program Mask ROM.
BLOCK DIAGRAM
P1.0-7
P0.0-7
RD
X1
WR
8051
X2 _{CORE INT}
1
P2.0-3
RST
P3.0-P3.2 P3.4 ^P2.4-7
P0.0-7
RD
WR
XFR
WATCH-DOG
TIMER
RST
HSCL
HSDA
DDC 1/2 B & FIFO
INTERFACE
STOUT
HSYNC
H / VSYNC VSYNC
CONTROL HBLANK
VBLANK
14 CHANNEL ^DA0-9
PWM DAC
DA10-13
ADC
AD0
AD1
ISCL
IIC INTERFACE
ISDA
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without
notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
MTV112A Revision 1.9 05/18/2001
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