ML610Q172 Datasheet, PDF (1/29 Pages) List of Unclassifed Manufacturers – The low power micro controller corresponding to 5v for household appliances

ML610Q172/ML610Q173
The low power micro controller corresponding to 5v for household appliances
I
GENERAL DESCRIPTION
FEDL610Q172-01
Issue Date: Oct 25, 2013
This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as 10-bit
A/D converter, timer, PWM, synchronous serial port, UART, I2C bus interface (master), Battery level detect
circuit, LCD driver, are incorporated around 8-bit CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe
line architecture parallel procesing.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
• CPU
− 8-bit RISC CPU (CPU name: nX-U8/100)
− Instruction system:16-bit instructions
− Instruction set:Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit
manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic
shift, and so on
− On-Chip debug function
− Minimum instruction execution time
Approx 30.5 μs (at 32.768kHz system clock)
Approx 0.122 μs (at 8.192MHz system clock)＠V_DD = 2.2 to 5.5V
• Internal memory
− Internal 128-Kbyte flash ROM(64K × 16-bit)
− Internal 2-Kbyte Data Flash (1-Kbyte × 2)
− Internal 4-Kbyte RAM (4096 × 8 -bit)
(including unusable 1KByte TEST area)
• Interrupt controller
− 1 non-maskable interrupt sources (Internal source: 1, External source: 1)
− 24 maskable interrupt sources (Internal source: 20, External source: 4)：ML610Q172
− 26 maskable interrupt sources (Internal source: 22, External source: 4)：ML610Q173
• Time base counter
− Low-speed time base counter × 1 channel
− High-speed time base counter × 1 channel
• Watchdog timer
− Generates a non-maskable interrupt upon the first overflow and a system reset occurs upon the second
− Free running
− Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s)
• Timers
− 8 bits × 6ch (16-bit configuration available)
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