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HX428C14PBK8-64 Datasheet, PDF (1/2 Pages) List of Unclassifed Manufacturers – DDR4-2800 CL14 288-Pin DIMM | |||
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HX428C14PBK8/64
64GB (8GB 1G x 64-Bit x 8 pcs.)
DDR4-2800 CL14 288-Pin DIMM
DESCRIPTION
HyperX HX428C14PBK8/64 is a kit of eight 1G x 64-bit (8GB)
DDR4-2800 CL14 SDRAM (Synchronous DRAM) 2Rx8,
memory module, based on sixteen 512M x 8-bit FBGA
components per module. Each module kit supports Intel®
Extreme Memory Profiles (Intel® XMP) 2.0. Total kit
capacity is 64GB. Each module has been tested to run at
DDR4-2800 at a low latency timing of 14-15-15 at 1.35V. The
SPDs are programmed to JEDEC standard latency
DDR4-2133 timing of 15-15-15 at 1.2V. Each 288-pin
DIMM uses gold contact fingers. The JEDEC standard
electrical and mechanical specifications are as follows:
XMP TIMING PARAMETERS
â¢JEDEC: DDR4-2133 CL15-15-15 @1.2V
â¢XMP Profile #1: DDR4-2800 CL14-15-15 @1.35V
â¢XMP Profile #2: DDR4-2666 CL14-14-14 @1.35V
SPECIFICATIONS
CL(IDD)
Row Cycle Time (tRCmin)
Refresh to Active/Refresh
Command Time (tRFCmin)
Row Active Time (tRASmin)
Maximum Operating Power
UL Rating
Operating Temperature
Storage Temperature
15 cycles
46.5ns(min.)
260ns(min.)
33ns(min.)
TBD W*
94 V - 0
0o C to +85o C
-55o C to +100o C
*Power will vary depending on the SDRAM used.
FEATURES
⢠Power Supply: VDD=1.2V Typical
⢠VDDQ = 1.2V Typical
⢠VPP - 2.5V Typical
⢠VDDSPD=2.2V to 3.6V
⢠Nominal and dynamic on-die termination (ODT) for
data, strobe, and mask signals
⢠Low-power auto self refresh (LPASR)
⢠Data bus inversion (DBI) for data bus
⢠On-die VREFDQ generation and calibration
⢠Dual-rank
⢠On-board I2 serial presence-detect (SPD) EEPROM
⢠16 internal banks; 4 groups of 4 banks each
⢠Fixed burst chop (BC) of 4 and burst length (BL) of 8
via the mode register set (MRS)
⢠Selectable BC4 or BL8 on-the-fly (OTF)
⢠Fly-by topology
⢠Terminated control command and address bus
⢠Height 2.167â (55.05mm), w/heatsink
kingston.com/hyperx
Continued >>
Document No. 4807267-001.B00 04/21/15 Page 1
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