HX318LS11IBK2-16 Datasheet, PDF (1/2 Pages) List of Unclassifed Manufacturers – 16GB (8GB 1G x 64-Bit x 2 pcs.) DDR3L-1866

HX318LS11IBK2/16
16GB (8GB 1G x 64-Bit x 2 pcs.) DDR3L-1866
CL11 204-Pin SODIMM Kit
SPECIFICATIONS
CL(IDD)
11 cycles
Row Cycle Time (tRCmin)
Refresh to Active/Refresh
Command Time (tRFCmin)
44.7ns (min.)
260ns (min.)
Row Active Time (tRASmin)
34ns (min.)
Maximum Operating Power
UL Rating
Operating Temperature
Storage Temperature
TBD W* @1.35V
94 V - 0
0^o C to 85^o C
-55^o C to +100^o C
*Power will vary depending on the SDRAM used.
DESCRIPTION
HyperX HX318LS11IBK2/16 is a kit of two 1G x 64-bit (8GB)
DDR3L-1866 CL11 SDRAM (Synchronous DRAM) 2Rx8, low
voltage, memory modules, based on sixteen 512M x 8-bit DDR3
FBGA components per module. Total kit capacity is 16GB.
Each module kit has been tested to run at DDR3L-1866 at a
low latency timing of 11-11-11 at 1.35V or 1.5V. Additional
timing parameters are shown in the PnP Timing Parameters
section below. The JEDEC standard electrical and mechanical
specifications are as follows:
Note: The PnP feature offers a range of speed and timing options to support
the widest variety of processors and chipsets. Your maximum speed will
be determined by your BIOS.
PnP JEDEC TIMING PARAMETERS:
• DDR3-1866 CL11-11-11 @1.35V or 1.5V
• DDR3-1600 CL10-10-10 @1.35V or 1.5V
• DDR3-1333 CL8-8-8 @1.35V or 1.5V
FEATURES
• JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~
1.575V) Power Supply
• VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
• 933MHz fCK for 1866Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 13, 11, 10, 9, 8, 7, 6, 5
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), double sided component
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Document No. 4807289-001.A00 03/19/15 Page 1