DV2003S2_14 Datasheet, PDF (1/6 Pages) List of Unclassifed Manufacturers – Fast Charge Development System Control of On-Board N-FET Switch-Mode Regulator

DV2003S2
Fast Charge Development System
Control of On-Board N-FET
Switch-Mode Regulator
Features
➤ bq2003 fast charge control evaluation and bq2003
fast-charge control evaluation and development
➤ Charge current sourced from an on-board
switch-mode regulator (up to 6.0 A)
➤ Fast charge of 2 to 16 NiCd or NiMH cells
➤ Fast-charge termination by delta temperature/delta
time (∆T/∆t), negative delta voltage (-∆V), maximum
temperature, maximum time, and maximum voltage
➤ -∆V enable, hold-off, top-off, maximum time, and
number of cells are jumper-configurable
➤ Charging status displayed on charge and
temperature LEDs
➤ Discharge-before-charge control with push-button
switch
➤ Inhibit fast charge by external logic-level input
General Description
The DV2003S2 Development System provides a develop-
ment environment for the bq2003 Fast-Charge IC. The
DV2003S2 incorporates a bq2003 and an N-FET buck-
type switch-mode regulator to provide fast charge control
for 2 to 16 NiCd or NiMH cells. The primary difference
between the DV2003S2 and the DV2003S1 is in the
switching FET Q1. The DV2003S1 uses a P-FET for bat-
tery charge currents of 3.0A or less, whereas the
DV2003S2 uses an n-FET to support charge currents up
to 6.0A.
Review the bq2003 data sheet and the application note,
“Using the bq2003 to Control Fast Charge,” before using
the DV2003S2 board. Also review the application note,
“Step-Down Switching Current Regulation Using the
bq2003,” for information concerning trade-offs between
using P-FET and N-FET transistors for Q1.
The fast charge is terminated by any of the following: ∆T/
∆t, -∆V, maximum temperature, maximum time, maxi-
mum voltage, or an external inhibit command. Jumper
settings select the -∆V enabled state, and the hold-off,
top-off, and maximum time limits.
10/97
The user provides a power supply and batteries. The user
configures the DV2003S2 for the number of cells, -∆V
charge termination, and maximum charge time (with or
without top-off), and commands the discharge-before-
charge option with the push-button switch S1.
Connection Descriptions
JP6
DC+
DC input from charger supply
THERM Thermistor connection
DSCHG Low side of discharge load
BAT+
Positive battery terminal and high side
of discharge load
BAT–
Negative battery terminal and
thermistor connection
GND
Ground from charger supply
JP5
+V
Voltage source for inhibit input
IN
Inhibit input to prevent bq2003 activity
JP1 DVEN Negative voltage termination enable
Rev. B Board
1