DV2003S1_14 Datasheet, PDF (1/6 Pages) List of Unclassifed Manufacturers – Fast Charge Development System Control of On-Board P-FET Switch-Mode Regulator

DV2003S1
Fast Charge Development System
Control of On-Board P-FET
Switch-Mode Regulator
Features
➤ bq2003 fast-charge control evaluation and
development
➤ Charge current sourced from an on-board
switch-mode regulator (up to 3.0 A)
➤ Fast charge of 2 to 16 NiCd or NiMH cells
➤ Fast-charge termination by delta temperature/delta
time (∆T/∆t), negative delta voltage (-∆V), maximum
temperature, maximum time, and maximum voltage
➤ -∆V enable, hold-off, top-off, maximum time, and
number of cells are jumper-configurable
➤ Charging status displayed on charge and
temperature LEDs
➤ Discharge-before-charge control with push-button
switch
➤ Inhibit fast charge by external logic-level input
Connection Descriptions
General Description
The DV2003S1 Development System provides a develop-
ment environment for the bq2003 Fast-Charge IC. The
DV2003S1 incorporates a bq2003 and a buck-type
switch-mode regulator to provide fast charge control for
2 to 16 NiCd or NiMH cells.
Review the bq2003 data sheet and the application note,
“Using the bq2003 to Control Fast Charge,” before using
the DV2003S1 board.
The fast charge is terminated by any of the following:
∆T/∆t, -∆V, maximum temperature, maximum time,
maximum voltage, or an external inhibit command.
Jumper settings select the -∆V enabled state, and the
hold-off, top-off, and maximum time limits.
The user provides a power supply and batteries. The
user configures the DV2003S1 for the number of cells,
-∆V charge termination and maximum charge time (with
or without top-off), and commands the discharge-before-
charge option with the push-button switch S1.
J6
DC+
DC input from charger supply
THERM Thermistor connection
DSCHG Low side of discharge load
BAT+
Positive battery terminal and high side
of discharge load
BAT–
Negative battery terminal and
thermistor connection
GND
Ground from charger supply
J2
+V
Voltage source for inhibit input
IN
Inhibit input to prevent bq2003 activity
JP1 DVEN Negative voltage termination enable
JP2 TM1
TM1 setting
JP3 TM2
TM2 setting
JP4 NOC
Select number of cells
3/98
Rev. A Board
1