AT45DB021D_13 Datasheet, PDF (1/48 Pages) List of Unclassifed Manufacturers – 2-megabit 2.7V Minimum DataFlash

Features
• Single 2.7V to 3.6V Supply
• RapidS Serial Interface: 66MHz Maximum Clock Frequency
– SPI Compatible Modes 0 and 3
• User Configurable Page Size
– 256-Bytes per Page
– 264-Bytes per Page
– Page Size Can Be Factory Pre-configured for 256-Bytes
• Page Program Operation
– Intelligent Programming Operation
– 1,024 Pages (256/264-Bytes/Page) Main Memory
• Flexible Erase Options
– Page Erase (256-Bytes)
– Block Erase (2-Kbytes)
– Sector Erase (32-Kbytes)
– Chip Erase (2-Mbits)
• One SRAM Data Buffer (256/264-Bytes)
• Continuous Read Capability through Entire Array
– Ideal for Code Shadowing Applications
• Low-power Dissipation
– 7mA Active Read Current Typical
– 25μA Standby Current Typical
– 15μA Deep Power-down Typical
• Hardware and Software Data Protection Features
– Individual Sector
• Sector Lockdown for Secure Code and Data Storage
– Individual Sector
• Security: 128-byte Security Register
– 64-byte User Programmable Space
– Unique 64-byte Device Identifier
• JEDEC Standard Manufacturer and Device ID Read
• 100,000 Program/Erase Cycles Per Page Minimum
• Data Retention – 20 Years
• Industrial Temperature Range
• Green (Pb/Halide-free/RoHS Compliant) Packaging Options
2-megabit
2.7V Minimum
DataFlash
AT45DB021D
(Not Recommended
for New Designs)
Description
The AT45DB021D is a 2.7V, serial-interface Flash memory ideally suited for a wide
variety of digital voice-, image-, program code- and data-storage applications. The
AT45DB021D supports RapidS^™ serial interface for applications requiring very high
speed operations. RapidS serial interface is SPI compatible for frequencies up to
66MHz. Its 2-,162-,688-bits of memory are organized as 1,024-pages of 256-bytes or
264-bytes each. In addition to the main memory, the AT45DB021D also contains one
SRAM buffer of 256-/264-bytes. EEPROM emulation (bit or byte alterability) is easily
handled with a self-contained three step read-modify-write operation. Unlike conven-
tional Flash memories that are accessed randomly with multiple address lines and a
parallel interface, the DataFlash^® uses a RapidS serial interface to sequentially
access its data. The simple sequential access dramatically reduces active pin count,
facilitates hardware layout, increases system reliability, minimizes switching noise,
and reduces package size.
3638M–DFLASH–5/2013