AT26DF081A_13 Datasheet, PDF (1/40 Pages) List of Unclassifed Manufacturers – Minimum SPI Serial Flash Memory

Features
• Single 2.7V - 3.6V Supply
• Serial Peripheral Interface (SPI) Compatible
– Supports SPI Modes 0 and 3
• 70 MHz Maximum Clock Frequency
• Flexible, Uniform Erase Architecture
– 4-Kbyte Blocks
– 32-Kbyte Blocks
– 64-Kbyte Blocks
– Full Chip Erase
• Individual Sector Protection with Global Protect/Unprotect Feature
– One 32-Kbyte Top Boot Sector
– Two 8-Kbyte Sectors
– One 16-Kbyte Sector
– Fifteen 64-Kbyte Sectors
• Hardware Controlled Locking of Protected Sectors
• Flexible Programming Options
– Byte/Page Program (1 to 256 Bytes)
– Sequential Program Mode Capability
• Automatic Checking and Reporting of Erase/Program Failures
• JEDEC Standard Manufacturer and Device ID Read Methodology
• Low Power Dissipation
– 5 mA Active Read Current (Typical)
– 25 μA Deep Power-down Current (Typical)
• Endurance: 100,000 Program/Erase Cycles
• Data Retention: 20 Years
• Complies with Full Industrial Temperature Range
• Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
– 8-lead SOIC (150-mil and 200-mil wide)
8-megabit
2.7-volt
Minimum
SPI Serial Flash
Memory
AT26DF081A
(Not Recommended
for New Designs)
1. Description
The AT26DF081A is a serial interface Flash memory device designed for use in a
wide variety of high-volume consumer-based applications in which program code is
shadowed from Flash memory into embedded or external RAM for execution. The
flexible erase architecture of the AT26DF081A, with its eras\e granularity as small as
4 Kbytes, makes it ideal for data storage as well, eliminating the need for additional
data storage EEPROM devices.
The physical sectoring and the erase block sizes of the AT26DF081A have been opti-
mized to meet the needs of today’s code and data storage applications. By optimizing
the size of the physical sectors and erase blocks, the memory space can be used
much more efficiently. Because certain code modules and data storage segments
must reside by themselves in their own protected sectors, the wasted and unused
memory space that occurs with large sectored and large block erase Flash memory
devices can be greatly reduced. This increased memory space efficiency allows addi-
tional code routines and data storage segments to be added while still maintaining the
same overall device density.
3600I–DFLASH–5/2013