AS6C4016 Datasheet, PDF (1/12 Pages) List of Unclassifed Manufacturers – 256K X 16 BIT SUPER LOW POWER CMOS SRAM

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AS6C4016
256K X 16 BIT SUPER ⁵L¹O²W^KP^XO⁸W^BER^ITC^LM^OO^WS S^PR^OA^WM^{ER CMOS SRAM}
FEATURES
Fast access time : 55ns
Low power consumption:
Operating current : 30mA (TYP.)
Standby current : 4 A (TYP.) LL-version
Single 2.7V ~ 5.5V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data byte control : LB# (DQ0 ~ DQ7)
UB# (DQ8 ~ DQ15)
Data retention voltage :1.5V(MIN.)
Lead free and green package available
Package : 44-pin 400 mil TSOP-II
48-ball 6mm x 8mm TFBGA
PRODUCT FAMILY
Product
Family
(I)
Operating
Temperature
-40 ~ 85
Vcc Range
2.7 ~ 5.5V
GENERAL DESCRIPTION
The
is a 4,194,304-bit low power
CMOS static random access memory organized as
262,144 words by 16 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
The
is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The
operates from a single power
supply of 2.7V ~ 5.5V and all inputs and outputs are
fully TTL compatible
Speed
55ns
Power Dissipation
Standby(ISB1,TYP.) Operating(Icc,TYP.)
4µA(LL)
30mA
FUNCTIONAL BLOCK DIAGRAM
L WW
L AA
O
V
OU OO U
CC
M7 2 c/2
CC
T
O RT
R
R YY2 c/2
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A17
Address Inputs
DQ0 – DQ15 Data Inputs/Outputs
CE#
Chip Enable Input
WE#
Write Enable Input
OE#
Output Enable Input
LB#
Lower Byte Control
UB#
Upper Byte Control
VCC
Power Supply
VSS
Ground
I
TO
O RT
R
MARCH/2008, V 1.0
Alliance Memory Inc.
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