IT8712F Datasheet, PDF (95/189 Pages) List of Unclassifed Manufacturers – Environment Control -Low Pin Count Input / Output(EC - LPC I/O)

Functional Description
9.5.2.2.8 Interrupt Mask Register 1 (Index=07h, Default=00h)
Bit
R/W
Description
7-5
R/W Reserved
4
R/W A “1” disables the Case Open Intrusion interrupt status bit for IRQ.
3
R/W Reserved
2-0
R/W A “1” disables the FAN_TAC3-1 interrupt status bit for IRQ.
9.5.2.2.9 Interrupt Mask Register 2 (Index=08h, Default=00h)
Bit
R/W
Description
7-0
R/W A “1” disables the VIN7-0 interrupt status bit for IRQ.
9.5.2.2.10 Interrupt Mask Register 3 (Index=09h, Default=00h)
Bit
R/W
Description
7-3
R/W Reserved
2-0
R/W A “1” disables the Temperature 3-1 interrupt status bit for IRQ.
9.5.2.2.11 VID Register (Index=0Ah)
Bit
R/W
Description
7
R/W Pseudo-EOC (end of conversion of ADC)
A Pseudo-EOC bit can speed up the FAN speed setup time in SmartGuardian automatic
mode. (Write the bit to 1 then write 0)
6
-
Reserved
5-0
R VID5-0 Inputs
9.5.2.2.12 Fan Tachometer Divisor Register (Index=0Bh, Default=09h)
Bit
R/W
Description
7
-
Reserved
6
R/W FAN_TAC3 Counter Divisor
0: divided by 2
1: divided by 8
5-3
R/W FAN_TAC2 Counter Divisor
000: divided by 1
001: divided by 2
010: divided by 4
011: divided by 8
100: divided by 16
101: divided by 32
110: divided by 64
111: divided by 128
2-0
R/W FAN_TAC1 Counter Divisor
000: divided by 1
001: divided by 2
010: divided by 4
011: divided by 8
100: divided by 16
101: divided by 32
110: divided by 64
111: divided by 128
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IT8712F V0.81