HWD2182 Datasheet, PDF (9/12 Pages) List of Unclassifed Manufacturers – 250mW Audio Power Amplifier with Shutdown Mode

Application Information (Continued)
vice or the shutdown function may cause the “click and pop”
circuitry to not operate fully, resulting in increased “click and
pop” noise.
The value of C_i will also reflect turn-on pops. Clearly, a cer-
tain size for C_i is needed to couple in low frequencies without
excessive attenuation. But in many cases, the speakers
used in portable systems have little ability to reproduce sig-
nals below 100 Hz to 150 Hz. In this case, using a large input
and output coupling capacitor may not increase system per-
formance. In most cases, choosing a small value of C_i in the
range of 0.1 µF to 0.33 µF, along with C_B equal to 1.0 µF
should produce a virtually clickless and popless turn-on. In
cases where C _i is larger than 0.33 µF, it may be advanta-
geous to increase the value of C_B. Again, it should be under-
stood that increasing the value of C_B will reduce the “clicks
and pops” at the expense of a longer device turn-on time.
AUDIO POWER AMPLIFIER DESIGN
Design a 250 mW/8Ω Audio Amplifier
Given:
Power Output
250 mWrms
Load Impedance
8Ω
Input Level
1 Vrms (max)
Input Impedance
20 kΩ
Bandwidth
100 Hz–20 kHz ± 0.50 dB
A designer must first determine the needed supply rail to ob-
tain the specified output power. Calculating the required sup-
ply rail involves knowing two parameters, V_OPEAK and also
the dropout voltage. The latter is typically 530mV and can be
found from the graphs in the Typical Performance Charac-
teristics. V_OPEAK can be determined from Equation 3.
(3)
For 250 mW of output power into an 8Ω load, the required
V_OPEAK is 2 volts. A minimum supply rail of 4.55V results
from adding V_OPEAK and V_OD. Since 5V is a standard supply
voltage in most applications, it is chosen for the supply rail.
Extra supply voltage creates headroom that allows the
HWD2182 to reproduce peaks in excess of 300 mW without
clipping the signal. At this time, the designer must make sure
that the power supply choice along with the output imped-
ance does not violate the conditions explained in the Power
Dissipation section.
Once the power dissipation equations have been addressed,
the required gain can be determined from Equation 4.
(4)
A_V = R_f / R_i (5)
From Equation 4, the minimum gain is:
A_V = 1.4
Since the desired input impedance was 20 kΩ, and with a
gain of 1.4, a value of 28 kΩ is designated for R_f, assuming
5% tolerance resistors. This combination results in a nominal
gain of 1.4. The final design step is to address the bandwidth
requirements which must be stated as a pair of −3 dB fre-
quency points. Five times away from a −3 dB point is 0.17 dB
down from passband response assuming a single pole roll-
off. As stated in the External Components section, both R_i
in conjunction with C _i, and C_o with R_L, create first order high-
pass filters. Thus to obtain the desired frequency low re-
sponse of 100 Hz within ±0.5 dB, both poles must be taken
into consideration. The combination of two single order filters
at the same frequency forms a second order response. This
results in a signal which is down 0.34 dB at five times away
from the single order filter −3 dB point. Thus, a frequency of
20 Hz is used in the following equations to ensure that the re-
sponse is better than 0.5 dB down at 100 Hz.
C_i ≥ 1 / (2π * 20 kΩ * 20 Hz) = 0.397 µF; use 0.39 µF.
C_o ≥ 1 / (2π * 8Ω * 20 Hz) = 995 µF; use 1000 µF.
The high frequency pole is determined by the product of the
desired high frequency pole, f_H, and the closed-loop gain, A
V. With a closed-loop gain of 1.4 and f_H = 100 kHz, the result-
ing GBWP = 140 kHz which is much smaller than the
HWD2182 GBWP of 12.5Mhz. This figure displays that if a de-
signer has a need to design an amplifier with a higher gain,
the HWD2182 can still be used without running into bandwidth
limitations.
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