S24VP04 Datasheet, PDF (8/12 Pages) List of Unclassifed Manufacturers – 4K Serial E2PROM with a Precision Low-VCC Lockout Circuit

S24VP04
Sequential READ
Sequential READs can be initiated as either a current
address READ or random access READ. The first word is
transmitted as with the other byte read modes (current
address byte READ or random address byte READ);
however, the master now responds with an ACKnowledge,
indicating that it requires additional data from the
S24VP04. The S24VP04 continues to output data for
each ACKnowledge received. The master terminates the
sequential READ operation by not responding with an
ACKnowledge, and issues a STOP conditions.
During a sequential read operation, the internal address
counter is automatically incremented with each acknowl-
edge signal. For read operations, all address bits are
incremented, allowing the entire array to be read using a
single read command. After a count of the last memory
address, the address counter will ‘roll-over’ and the
memory will continue to output data. See Figure 10 for the
address, acknowledge and data transfer sequence.
Acknowledges from 24VP04
Acknowledge from
Master Receiver
Lack of
Acknowledge from
Master Receiver
SDA Bus
Activity
A
A
A
2
A
1
B
S
R
W
C
Word Address
C
K
K
A
A
A A B R _{C First Data Byte C}
2 1 SW
K
K
Last Data Byte
1010
0
S
T Device
A Type
R Address
T
A2,A1,BS
Read/Write
0= Write
Slave Address
AA AA AA AA
76 54 32 10
1010
1
S
T Device
A Type _A2,A1,BS
R Address
T
Read/Write
1= Read
Slave Address
DD DD DD DD
76 54 32 10
DD DD DD DD
76 54 32 10 1
S
T
O
P
Lack of ACK (low)
determines last
data byte to be read
Master sends Read
request to Slave
Master Transmitter
to
Slave Receiver
Master Writes Word
Address to Slave
Master Transmitter
to
Slave Receiver
Master Requests
Data from Slave
Master Transmitter
to
Slave Receiver
Slave sends
Data to Master
Slave Transmitter
to
Master Receiver
Slave sends
Data to Master
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Shading Denotes
24VP04
SDA Output Active
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Master Transmitter
to
Slave Receiver
2008 ILL 12 1.0
FIGURE 10. SEQUENTIAL READ OPERATION (starting with a Random Address READ)
2008 1.4 5/15/98
8