STC62WV1M8 Datasheet, PDF (4/9 Pages) List of Unclassifed Manufacturers – Very Low Power/Voltage CMOS SRAM 1M X 8 bit

STC
„AC TEST CONDITIONS
(Test Load and Input/Output Reference)
Input Pulse Levels
Vcc / 0V
Input Rise and Fall Times
1V/ns
Input and Output
Timing Reference Level
Output Load
0.5Vcc
CL = 30pF+1TTL
CL = 100pF+1TTL
STC62WV1M8
„ KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
„ AC ELECTRICAL CHARACTERISTICS ( TA = -40^oC to + 85^oC )
READ CYCLE
JEDEC
PARAMETER
NAME
t
AVAX
t
AVQV
t
E1LQV
t
E2LQV
t
GLQV
t
ELQX
t
GLQX
t
EHQZ
t
GHQZ
t
AXOX
PARAMETER
NAME
DESCRIPTION
t
RC
t
AA
t
ACS1
t
ACS2
t
OE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
t
OH
Read Cycle Time
Address Access Time
Chip Select Access Time (CE1)
Chip Select Access Time (CE2)
Output Enable to Output Valid
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
Data Hold from Address Change
CYCLE TIME : 70ns
Vcc=2.7~5.5V
MIN. TYP. MAX.
70
--
--
--
--
70
--
--
70
--
--
70
--
--
35
10
--
--
10
--
--
--
--
35
--
--
30
CYCLE TIME : 55ns
Vcc=3.0~5.5V
MIN. TYP. MAX.
55 -- --
-- -- 55
-- -- 55
-- -- 55
-- -- 30
10 -- --
10 -- --
-- -- 30
-- -- 25
10
--
-- 10 -- --
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R0201-STC62WV1M8
4
Revision 2.1
Jan. 2004