HMN1288J Datasheet, PDF (4/8 Pages) List of Unclassifed Manufacturers – Non-Volatile SRAM MODULE 1Mbit (128K x 8-Bit),34Pin-JLCC, 5V

HANBit
HMN1288J
DC ELECTRICAL CHARACTERISTICS (T_A= T_OPR, V_CCmin £ V_CC ≤
PARAMETER
CONDITIONS
SYMBOL
MIN
Input Leakage Current
V_IN=V_SS to V_CC
I_LI
-
Output Leakage Current
Output high voltage
/CE=V_IH or /OE=V_IH
or /WE=V_IL
I_OH=-1.0mA
I_LO
-
V_OH
2.4
Output low voltage
I_OL= 2.0mA
V_OL
-
V_CCmax )
TYP.
-
-
-
-
MAX
± 2.0
± 2.0
-
0.4
V_CC Trip Point (TOL=GND)
V_CCTP
4.5
4.62
4.75
Standby supply current
/CE=2.2v
I_SB
-
-
3
Standby supply current
/CE≥ V_CC-0.3V,
I_SB1
Operating Power supply _{/CE=VIL, II/O=0㎃ ,}
I_CC
current
V_IN = V_IL or V_IH, Read
-
-
150
-
-
12
V_CC/V_BAT Switch Point
V_SW
NOTE: Typical values indicate operation at T_A = 25℃ .
2.6
2.7
2.8
UNIT
mA
mA
V
V
V
mA
mA
mA
V
CHARACTERISTICS (Test Conditions)
CL1)
Including scope and jig capacitance
PARAMETER
Input pulse levels
Input rise and fall times
Input and output timing reference
levels
Output load (CL¹⁾ =50pF+1TTL)
(CL¹⁾ =100pF+1TTL)
VALUE
0.8 to 2.4V
5 ns
1.5V ( unless otherwise specified)
See Figures
READ CYCLE (T_A= T_OPR, V_CCmin £ V_CC≤ V_CCmax )
PARAMETER
SYMBOL CONDITIONS
Read Cycle Time
tRC
Address Access Time
tACC
Output load A
Chip enable access time
tACE
Output load A
Output enable to Output valid
tOE
Output load A
Chip enable to output in low Z
tCLZ
Output load B
Output enable to output in low Z
tOLZ
Output load B
Chip disable to output in high Z
tCHZ
Output load B
Output disable to output high Z
tOHZ
Output load B
Output hold from address change
tOH
Output load A
-55
MIN
MAX
55
-
-
55
55
-
25
10
-
5
-
0
20
0
20
10
-
-70
MIN
MAX
70
-
-
70
-
70
-
35
10
-
5
-
0
25
0
25
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
URL: www.hbe.co.kr
Rev.0.0 (FEBRUARY/ 2002)
4
HANBit Electronics Co.,Ltd.