WS6264 Datasheet, PDF (3/13 Pages) List of Unclassifed Manufacturers – High Speed Super Low Power SRAM

High Speed Super Low Power SRAM
8K-Word By 8 Bit
WS6264
PIN DESCRIPTIONS
Name
A0 – A12
/CE1,CE2
/WE
/OE
DQ0~DQ7
Vcc
Gnd
NC
Type
Input
Input
Input
Input
I/O
Power
Power
Function
Address inputs for selecting one of the 8,192 x 8 bit words in the RAM
/CE1 is active LOW and CE2 is active HIGH. Both chip enables must be
active when data read from or write to the device. If either chip enable is not
active, the device is deselected and in a standby power down mode. The DQ
pins will be in high impedance state when the device is deselected.
The Write enable input is active LOW. It controls read and write operations.
With the chip selected, when /WE is HIGH and /OE is LOW, output data will
be present on the DQ pins, when /WE is LOW, the data present on the DQ
pins will be written into the selected memory location.
The output enable input is active LOW. If the output enable is active while the
chip is selected and the write enable is inactive, data will be present on the
DQ pins and they will be enabled. The DQ pins will be in the high impedance
state when /OE is inactive.
These 8 bi-directional ports are used to read data from or write data into the
RAM.
Power Supply
Ground
No connection
TRUTH TABLE
MODE
/CE1 CE2 /WE /OE
H
X
X
X
Standby
X
L
X
X
Output
L
H
H
H
Disable
Read
L
H
H
L
Write
L
H
L
X
DQ0~7
High Z
High Z
D_OUT
D_IN
Vcc Current
I_CCSB, I_CCSB1
I_CC
I_CC
I_CC
Rev. 1.0
3