SSI32F8030 Datasheet, PDF (3/10 Pages) List of Unclassifed Manufacturers – Programmable Electronic Filter

SSI 32F8030
Programmable
Electronic Filter
PIN DESCRIPTION
NAME
TYPE DESCRIPTION
VIN+, VIN-
I
DIFFERENTIAL SIGNAL INPUTS. The input signals must be AC coupled to
these pins.
VO_NORM+,
VO_NORM-
O DIFFERENTIAL NORMAL OUTPUTS. The output signals must be AC
coupled.
O
VO_DIFF+,
VO_DIFF-
O DIFFERENTIAL DIFFERENTIATED OUTPUTS. For minimum time skew,
these outputs should be AC coupled to the pulse detector.
IFP
I
FREQUENCY PROGRAM INPUT. The filter cutoff frequency FC, is set by an
external current IFP, injected into this pin. IFP must be proportional to voltage
VR. This current can be set with an external current generator such as a DAC.
VFP should be left open when using this pin.
VFP
I
FREQUENCY PROGRAM INPUT. The filter cutoff frequency can be set by
programming a current through a resistor from VR to this pin. IFP should be
left open when using this pin.
VBP
I
FREQUENCY BOOST PROGRAM INPUT. The high frequency boost is set
by an external voltage applied to this pin. VBP must be proportional to voltage
VR. A fixed amount of boost can be set by an external resistor divider network
connected from VBP to VR and GND. No boost is applied if the FBST pin is
grounded, or at logic low.
FBST
I
FREQUENCY BOOST. A high logic level or open input enables the frequency
boost circuitry.
PWRON
I
POWER ON. A high logic level enables the chip. A low level puts the chip in
a low power state.
VR
VCC1, VCC2
– REFERENCE VOLTAGE. Internally generated reference voltage.
I +5 VOLT SUPPLY.
GND1, GND2
– GROUND
3