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SE9174 Datasheet, PDF (3/5 Pages) List of Unclassifed Manufacturers – 2.0A Bus Termmination Regulator
Application Information
Internal parasitic diode
Avoid forward-bias internal parasitic diode,
VOUT to VCNTL, and VOUT to VIN, the VOUT should not
be forced same voltage respect to ground on this
pin while the VCNTL or VIN is disappeared.
Consideration while designs the resistance of
voltage divider
Make sure the sinking current capability of
pull-down NMOS if the lower resistance was chosen
so that the voltage on VREFEN is below 0.2V.
In addition to item1, the capacitor and voltage
divider form the low-pass filter. There are two
reasons doing this design; one is for output voltage
soft-start while another is for noise immunity.
Thermal Consideration
SE9174 regulators have internal thermal
limiting circuitry designed to protect the device
during overload conditions. For continuous normal
load conditions however, the maximum junction
temperature rating of 150°C must not be exceeded.
Higher continuous currents or ambient temperature
require additional heatsinking. Heat sinking to the
IC package must consider the worst case power
dissipation which may occur.
It should also be noted that with the VCNTL
equal to 5V, the point of thermal shutdown will be
degraded by approx. 20°C compared to the VCNTL
equipped with 3.3V. It is highly recommended that
to use the 3.3V rail acting as the VCNTL so as to
minimize the thermal concern of the SE9174 in the
SOP-8 package.
Layout Consideration
The SE9174 regulator is packaged in
thermally enhanced plastic SOP-8 package. This
small footprint package is unable to convectively
dissipate the heat generated when the regulator is
operating at high current levels. In order to control
die operating temperatures, the PC board layout
should allow for maximum possible copper area at
the VCNTL pins of the SE9174.
The multiple VCNTL pins on the SOP-8 package
are internally connected, but lowest thermal
resistance will result if these pins are tightly
connected on the PC board. This will also aid heat
dissipation at high power levels.
If the large copper around the IC is
unavailable, a buried layer may be used as a heat
spreader, Use via to conduct the heat into the
buried or backside of PCB layer. The via should be
small enough to retain solder when the board is
wave-soldered.
REFEN
VOUT
SE9174
SE9174 VOUT
Terminator Resis
R0
BUS(0)
R1
BUS(1)
R2
BUS(2)
R3
BUS(3)
R4
BUS(4)
R5
BUS(5)
R6
BUS(6)
R7
BUS(7)
R8
BUS(8)
R9
BUS(9)
RN
RN1
BUS(N+1)
BUS(N)
All contents are subject to change without prior notice
© Seaward Electronics Inc., 2005. • www.seawardinc.com • Page 3