HX6356 Datasheet, PDF (3/12 Pages) List of Unclassifed Manufacturers – 32K x 8 STATIC RAM-SOI

HX6356
RADIATION CHARACTERISTICS
Total Ionizing Radiation Dose
The SRAM will meet all stated functional and electrical
specifications over the entire operating temperature range
after the specified total ionizing radiation dose. All electrical
and timing performance parameters will remain within
specifications after rebound at VDD = 5.5 V and T =125°C
extrapolated to ten years of operation. Total dose hardness
is assured by wafer level testing of process monitor transis-
tors and RAM product using 10 keV X-ray and Co60
radiation sources. Transistor gate threshold shift correla-
tions have been made between 10 keV X-rays applied at a
dose rate of 1x10⁵ rad(SiO₂)/min at T = 25°C and gamma
rays (Cobalt 60 source) to ensure that wafer level X-ray
testing is consistent with standard military radiation test
environments.
The SRAM will meet any functional or electrical specifica-
tion after exposure to a radiation pulse up to the transient
dose rate survivability specification, when applied under
recommended operating conditions. Note that the current
conducted during the pulse by the RAM inputs, outputs,
and power supply may significantly exceed the normal
operating levels. The application design must accommo-
date these effects.
Neutron Radiation
The SRAM will meet any functional or timing specification
after exposure to the specified neutron fluence under
recommended operating or storage conditions. This as-
sumes an equivalent neutron energy of 1 MeV.
Transient Pulse Ionizing Radiation
The SRAM is capable of writing, reading, and retaining
stored data during and after exposure to a transient
ionizing radiation pulse up to the transient dose rate upset
specification, when applied under recommended operat-
ing conditions. To ensure validity of all specified perfor-
mance parameters before, during, and after radiation
(timing degradation during transient pulse radiation (tim-
ing degradation during transient pulse radiation is ≤10%),
it is suggested that stiffening capacitance be placed on or
near the package VDD and VSS, with a maximum induc-
tance between the package (chip) and stiffening capaci-
tance of 0.7 nH per part. If there are no operate-through
or valid stored data requirements, typical circuit board
mounted de-coupling capacitors are recommended.
Soft Error Rate
The SRAM has an extremely low Soft Error Rate (SER) as
specified in the table below. This hardness level is defined
by the Adams 90% worst case cosmic ray environment.
The low SER is achieved by the use of a unique 7-transistor
memory cell and the oxide isolation of the SOI substrate.
Latchup
The SRAM will not latch up due to any of the above radiation
exposure conditions when applied under recommended
operating conditions. Fabrication with the SIMOX substrate
material provides oxide isolation between adjacent PMOS
and NMOS transistors and eliminates any potential SCR
latchup structures. Sufficient transistor body tie connec-
tions to the p- and n-channel substrates are made to ensure
no source/drain snapback occurs.
RADIATION HARDNESS RATINGS (1)
Parameter
Limits (2)
Units
Total Dose
Transient Dose Rate Upset
Transient Dose Rate Survivability
Soft Error Rate
Neutron Fluence
≥1x10⁶
≥1x10¹¹
≥1x10¹²
<1x10^-10
≥1x10¹⁴
rad(SiO₂)
rad(Si)/s
rad(Si)/s
upsets/bit-day
N/cm²
(1) Device will not latch up due to any of the specified radiation exposure conditions.
(2) Operating conditions (unless otherwise specified): VDD=4.5 V to 5.5 V, -55°C to 125°C.
Test Conditions
TA=25°C
Pulse width ≤1 µs
Pulse width ≤50 ns, X-ray,
VDD=6.0 V, TA=25°C
TA=125°C, Adams 90%
worst case environment
1 MeV equivalent energy,
Unbiased, TA=25°C
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