CZ80PIO Datasheet, PDF (3/4 Pages) List of Unclassifed Manufacturers – Hereinafter Referred to As PIO, is a Dual-Port Device

Block Diagram
CZ80PIO Megafunction Datasheet
8
data_i
8 _{data_o}
data_tri
clk
cdselect
portselect Control
ce_n
Logic
m1_n
iorq_n
rd_n
int_n
ieo
iei
internal
bus
Port A
Logic
Port B
Logic
8
portb_i
portb_o
8
portb_tri
8
brdy
bstb_n
8
porta_i
porta_o
8
porta_tri
8
ardy
astb_n
Figure 1. CZ80PIO Peripheral Device Block Diagram
Device Utilization & Performance
Supported
Family
Flex
Acex
Apex
Apex2
Cyclone
Stratix
Stratix-II
Device
Tested
EPF10KE30-1
EP1K30-1
EP20KE30-1
EP2A15-7
EP1C3-6
EP1S10-5
EP2S15-3
Utilization
LEs
Memory
733
-
731
-
748
-
763
-
583
-
583
-
561
-
Notes:
1. Optimized for speed
2. Assumes all I/O is routed off-chip
Performance
(MHz)
67 MHz
67 MHz
70 MHz
95 MHz
120 MHz
132 MHz
218 MHz
CAST, Inc.
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