H.261 Datasheet, PDF (26/31 Pages) List of Unclassifed Manufacturers – LINE TRANSMISSION OF NON-TELEPHONE SIGNALS

5.4.4 Relock time for error corrector framing
Three consecutive error correction framing sequences (24 bits) should be received before frame lock is deemed to have been
achieved. The decoder should be designed such that frame lock will be re-established within 34 000 bits after an error
corrector framing phase change.
NOTE – This assumes that the video data does not contain three correctly phased emulations of the error correction framing
sequence during the relocking period.
Recommendation H.261 (03/93)
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