JM20330 Datasheet, PDF (2/2 Pages) List of Unclassifed Manufacturers – Serial ATA Bridge Chip

Functional Block Diagram
JMicron/JM20330
Parallel ATA
Application Layer (ATA/
ATAPI Controller)
FIFO
FIFO
Transport
Layer
Link Layer
Physical
Layer
(PHY)
Status and Control Register
(SCR)
Register File
GPIO I/F
RXP/RXN
TXP/TXN
MODE[2:0]
GIO0
GIO1
Applications
Fig. 1 Functional Block Diagram of JM20330
Device Bridge
Host Bridge
HDD/
Optical ^{Parallel ATA}
Storage
Status and Control Register
(SCR)
Register File
JM30330
RXP/
RXN
TXP/
TXN
GPIO I/
F
MODE
= 0xx
GIO0
GIO1
TXP/
TXN
RXP/
RXN
MODE
=1xx
GIO0
GIO1
Status and Control Register
(SCR)
Register File
JM30330
PC IDE _{Parallel ATA}
Port
GPIO I/
F
Fig. 2 JM20330 Host and Device bridge system diagram
Product Information
Name
JM20330
Design Kit
1 JM20330 Data Sheet
2 JM20330 Design Guide
3 Application EVB
Description
Serial ATA Bridge Chip
Contact Information
Department
Email
Sales
[e-mail]
Tech. Support
[e-mail]
Version 1.0
© JMicron 2003. All rights reserved.
2-11-22
3-7-13
May 2003
Page 2
Copying prohibited.
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